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authorStefan Hajnoczi <stefanha@redhat.com>2017-05-05 16:21:00 +0100
committerStefan Hajnoczi <stefanha@redhat.com>2017-05-05 16:21:16 +0100
commit317134bb54bbaf13548c35d92cb00c650a18e32f (patch)
tree0b9f925b0bc5b30fa7bd0fc338462c147521c193 /linux-user/openrisc/target_cpu.h
parent4f3652b3aa5f77582c94ac434e960db242430eac (diff)
parentf4d1414a9385e3375d9107b29eeb75d27daf2147 (diff)
downloadqemu-317134bb54bbaf13548c35d92cb00c650a18e32f.tar.gz
Merge remote-tracking branch 'shorne/tags/pull-or-20170504' into staging
Openrisc Features and Fixes for qemu 2.10 # gpg: Signature made Thu 04 May 2017 01:41:45 AM BST # gpg: using RSA key 0xC3B31C2D5E6627E4 # gpg: Good signature from "Stafford Horne <shorne@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25 EFF1 C3B3 1C2D 5E66 27E4 * shorne/tags/pull-or-20170504: target/openrisc: Support non-busy idle state using PMR SPR target/openrisc: Remove duplicate features property target/openrisc: Implement full vmstate serialization migration: Add VMSTATE_STRUCT_2DARRAY() target/openrisc: implement shadow registers migration: Add VMSTATE_UINTTL_2DARRAY() target/openrisc: add numcores and coreid support target/openrisc: Fixes for memory debugging target/openrisc: Implement EPH bit target/openrisc: Implement EVBAR register MAINTAINERS: Add myself as openrisc maintainer Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'linux-user/openrisc/target_cpu.h')
-rw-r--r--linux-user/openrisc/target_cpu.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h
index f283d96a93..606ad6f695 100644
--- a/linux-user/openrisc/target_cpu.h
+++ b/linux-user/openrisc/target_cpu.h
@@ -23,14 +23,14 @@
static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp)
{
if (newsp) {
- env->gpr[1] = newsp;
+ cpu_set_gpr(env, 1, newsp);
}
- env->gpr[11] = 0;
+ cpu_set_gpr(env, 11, 0);
}
static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls)
{
- env->gpr[10] = newtls;
+ cpu_set_gpr(env, 10, newtls);
}
#endif