diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2012-10-06 18:54:46 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-10-06 18:54:46 +0200 |
| commit | 046dbab95f33e007428190610d638d2fcaf37fdf (patch) | |
| tree | 6110b604ea1eaa50406e5ece905cfa0700110d31 /target-arm/cpu.h | |
| parent | 048d3612a51b3da45081091b734f93428925ebf8 (diff) | |
| parent | 1273d9ca09e91bb290d10f704055f6abec363dd6 (diff) | |
| download | qemu-046dbab95f33e007428190610d638d2fcaf37fdf.tar.gz | |
Merge branch 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
target-arm: Drop unused DECODE_CPREG_CRN macro
target-arm: use deposit instead of hardcoded version
target-arm: mark a few integer helpers const and pure
target-arm: convert sar, shl and shr helpers to TCG
target-arm: convert add_cc and sub_cc helpers to TCG
target-arm: use globals for CC flags
target-arm: Reinstate display of VFP registers in cpu_dump_state
cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7fac94f817..ff4de10f12 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -423,8 +423,6 @@ void armv7m_nvic_complete_irq(void *opaque, int irq); (((cp) << 16) | ((is64) << 15) | ((crn) << 11) | \ ((crm) << 7) | ((opc1) << 3) | (opc2)) -#define DECODE_CPREG_CRN(enc) (((enc) >> 7) & 0xf) - /* ARMCPRegInfo type field bits. If the SPECIAL bit is set this is a * special-behaviour cp reg and bits [15..8] indicate what behaviour * it has. Otherwise it is a simple cp reg, where CONST indicates that |