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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:18:44 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:04 +0100 |
| commit | a50c0f51339ed1df0a2e289513e3e2bf5b5ca45c (patch) | |
| tree | 21ccde90de2f8ff2c25e6c3fd617da9233b9ca88 /target-arm/cpu.h | |
| parent | 52e60cdd342dc48116edb81b443ba8c0a0c6f1a3 (diff) | |
| download | qemu-a50c0f51339ed1df0a2e289513e3e2bf5b5ca45c.tar.gz | |
target-arm: Implement ARMv8 MVFR registers
For ARMv8 there are two changes to the MVFR media feature registers:
* there is a new MVFR2 which is accessible from 32 bit code
* 64 bit code accesses these via the usual sysreg instructions
rather than with a floating-point specific instruction
Implement this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 0ce4c26d16..ec0306b7a3 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -572,6 +572,7 @@ enum arm_cpu_mode { /* VFP system registers. */ #define ARM_VFP_FPSID 0 #define ARM_VFP_FPSCR 1 +#define ARM_VFP_MVFR2 5 #define ARM_VFP_MVFR1 6 #define ARM_VFP_MVFR0 7 #define ARM_VFP_FPEXC 8 |