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| author | Sergey Fedorov <serge.fdrv@gmail.com> | 2015-10-13 12:56:28 +0300 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-10-16 14:48:56 +0100 |
| commit | 5d98bf8f38c17a348ab6e8af196088cd4953acd0 (patch) | |
| tree | fe2222087a4923efd844201264c19e94012aa29f /target-arm/translate-a64.c | |
| parent | e63a2d4d9ed73e33a0b7483085808048be8bbcb1 (diff) | |
| download | qemu-5d98bf8f38c17a348ab6e8af196088cd4953acd0.tar.gz | |
target-arm: Fix CPU breakpoint handling
A QEMU breakpoint match is not definitely an architectural breakpoint
match. If an exception is generated unconditionally during translation,
it is hardly possible to ignore it in the debug exception handler.
Generate a call to a helper to check CPU breakpoints and raise an
exception only if any breakpoint matches architecturally.
Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate-a64.c')
| -rw-r--r-- | target-arm/translate-a64.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index a4580c07a6..19f9d8d2c8 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -11090,11 +11090,18 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb) CPUBreakpoint *bp; QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (bp->pc == dc->pc) { - gen_exception_internal_insn(dc, 0, EXCP_DEBUG); - /* Advance PC so that clearing the breakpoint will - invalidate this TB. */ - dc->pc += 2; - goto done_generating; + if (bp->flags & BP_CPU) { + gen_helper_check_breakpoints(cpu_env); + /* End the TB early; it likely won't be executed */ + dc->is_jmp = DISAS_UPDATE; + } else { + gen_exception_internal_insn(dc, 0, EXCP_DEBUG); + /* Advance PC so that clearing the breakpoint will + invalidate this TB. */ + dc->pc += 4; + goto done_generating; + } + break; } } } |