diff options
| author | Jan Kiszka <jan.kiszka@siemens.com> | 2011-03-15 12:26:21 +0100 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2011-03-16 17:11:05 -0300 |
| commit | ebda377f8c6d9a5ec69a0aeb2000aa5ce74f7fa2 (patch) | |
| tree | bebb3a9b4f319af91ad7d1c70e00f74c6bb4054b /target-i386 | |
| parent | d841b6c4f16c3fc7afe2ce355e7e42813345f053 (diff) | |
| download | qemu-ebda377f8c6d9a5ec69a0aeb2000aa5ce74f7fa2.tar.gz | |
x86: Properly reset PAT MSR
Conforming to the Intel spec, set the power-on value of PAT also on
reset, but save it across INIT.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/cpu.h | 4 | ||||
| -rw-r--r-- | target-i386/cpuid.c | 1 | ||||
| -rw-r--r-- | target-i386/helper.c | 5 |
3 files changed, 7 insertions, 3 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index d0eae754cc..c7047d5912 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -685,8 +685,6 @@ typedef struct CPUX86State { uint64_t tsc; - uint64_t pat; - uint64_t mcg_status; /* exception/interrupt handling */ @@ -707,6 +705,8 @@ typedef struct CPUX86State { CPU_COMMON + uint64_t pat; + /* processor features (e.g. for CPUID insn) */ uint32_t cpuid_level; uint32_t cpuid_vendor1; diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 5382a283f5..814d13e767 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -847,7 +847,6 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16); env->cpuid_version |= def->stepping; env->cpuid_features = def->features; - env->pat = 0x0007040600070406ULL; env->cpuid_ext_features = def->ext_features; env->cpuid_ext2_features = def->ext2_features; env->cpuid_ext3_features = def->ext3_features; diff --git a/target-i386/helper.c b/target-i386/helper.c index a08309f97a..d15fca591e 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -99,6 +99,8 @@ void cpu_reset(CPUX86State *env) env->mxcsr = 0x1f80; + env->pat = 0x0007040600070406ULL; + memset(env->dr, 0, sizeof(env->dr)); env->dr[6] = DR6_FIXED_1; env->dr[7] = DR7_FIXED_1; @@ -1280,8 +1282,11 @@ CPUX86State *cpu_x86_init(const char *cpu_model) void do_cpu_init(CPUState *env) { int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI; + uint64_t pat = env->pat; + cpu_reset(env); env->interrupt_request = sipi; + env->pat = pat; apic_init_reset(env->apic_state); env->halted = !cpu_is_bsp(env); } |