diff options
| author | Maciej W. Rozycki <macro@codesourcery.com> | 2014-12-05 18:47:58 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2014-12-16 12:45:20 +0000 |
| commit | d9224450208e0de62323b64ace91f98bc31d6e2c (patch) | |
| tree | 164e68e82fdd913662ed2c131dc173b2bc92e965 /target-mips/cpu.h | |
| parent | 90f12d735d66ac1196d9a2bced039a432eefc03d (diff) | |
| download | qemu-d9224450208e0de62323b64ace91f98bc31d6e2c.tar.gz | |
target-mips: Tighten ISA level checks
Tighten ISA level checks down to MIPS II that many of our instructions
are missing. Also make sure any 64-bit instruction enables are only
applied to 64-bit processors, that is ones that implement at least the
MIPS III ISA.
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index dd72d1ef50..e59cb4c6dc 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -831,9 +831,10 @@ static inline void compute_hflags(CPUMIPSState *env) env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU; } #if defined(TARGET_MIPS64) - if (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) || - (env->CP0_Status & (1 << CP0St_PX)) || - (env->CP0_Status & (1 << CP0St_UX))) { + if ((env->insn_flags & ISA_MIPS3) && + (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) || + (env->CP0_Status & (1 << CP0St_PX)) || + (env->CP0_Status & (1 << CP0St_UX)))) { env->hflags |= MIPS_HFLAG_64; } |