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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-03-11 18:22:15 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-03-11 18:22:15 +0000 |
| commit | ee74801035b0b5f1fdfd4e31d3a53f511f91c804 (patch) | |
| tree | c3f2cf22bc97526c17442fd966c23cf4b849e380 /target-mips/cpu.h | |
| parent | d598911b6f5e7bf7bafb63b8e1d074729e94aca7 (diff) | |
| parent | 644511117e7ca9f26d633a59c202a297113a796c (diff) | |
| download | qemu-ee74801035b0b5f1fdfd4e31d3a53f511f91c804.tar.gz | |
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into staging
MIPS patches 2015-03-11
Changes:
* use VMStateDescription for MIPS CPU
# gpg: Signature made Wed Mar 11 15:01:52 2015 GMT using RSA key ID 0B29DA6B
# gpg: Can't check signature: public key not found
* remotes/lalrae/tags/mips-20150311:
target-mips: add missing MSACSR and restore fp_status and hflags
target-mips: replace cpu_save/cpu_load with VMStateDescription
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index f44c814e56..f9d2b4c5af 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -614,8 +614,6 @@ void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf); extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env); extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env); -#define CPU_SAVE_VERSION 5 - /* MMU modes definitions. We carefully match the indices with our hflags layout. */ #define MMU_MODE0_SUFFIX _kernel @@ -781,6 +779,23 @@ static inline void restore_flush_mode(CPUMIPSState *env) &env->active_fpu.fp_status); } +static inline void restore_fp_status(CPUMIPSState *env) +{ + restore_rounding_mode(env); + restore_flush_mode(env); +} + +static inline void restore_msa_fp_status(CPUMIPSState *env) +{ + float_status *status = &env->active_tc.msa_fp_status; + int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM; + bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0; + + set_float_rounding_mode(ieee_rm[rounding_mode], status); + set_flush_to_zero(flush_to_zero, status); + set_flush_inputs_to_zero(flush_to_zero, status); +} + static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { |