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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-21 01:19:56 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-21 01:19:56 +0000 |
| commit | c570fd169c16f110781f31e0e963542a15229ee9 (patch) | |
| tree | a829998efa7b38a23addc5b248c8e416d513dea2 /target-mips/mips-defs.h | |
| parent | 328a42406d1da2044e2918918ac744f95a1eeb36 (diff) | |
| download | qemu-c570fd169c16f110781f31e0e963542a15229ee9.tar.gz | |
Preliminiary MIPS64 support, disabled by default due to performance impact.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/mips-defs.h')
| -rw-r--r-- | target-mips/mips-defs.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h index 14d1438bc2..83480c6ab4 100644 --- a/target-mips/mips-defs.h +++ b/target-mips/mips-defs.h @@ -14,7 +14,8 @@ #if (MIPS_CPU == MIPS_R4Kc) /* 32 bits target */ -#define TARGET_LONG_BITS 32 +#undef MIPS_HAS_MIPS64 +//#define MIPS_HAS_MIPS64 1 /* real pages are variable size... */ #define TARGET_PAGE_BITS 12 /* Uses MIPS R4Kx enhancements to MIPS32 architecture */ @@ -69,7 +70,7 @@ (0 << CP0C3_MT) | (0 << CP0C3_SM) | (0 << CP0C3_TL)) #elif (MIPS_CPU == MIPS_R4Kp) /* 32 bits target */ -#define TARGET_LONG_BITS 32 +#undef MIPS_HAS_MIPS64 /* real pages are variable size... */ #define TARGET_PAGE_BITS 12 /* Uses MIPS R4Kx enhancements to MIPS32 architecture */ @@ -79,8 +80,14 @@ #else #error "MIPS CPU not defined" /* Reminder for other flags */ -//#define TARGET_MIPS64 +//#undef MIPS_HAS_MIPS64 //#define MIPS_USES_FPU #endif +#ifdef MIPS_HAS_MIPS64 +#define TARGET_LONG_BITS 64 +#else +#define TARGET_LONG_BITS 32 +#endif + #endif /* !defined (__QEMU_MIPS_DEFS_H__) */ |