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| author | Nathan Froyd <froydnj@codesourcery.com> | 2009-12-08 08:06:23 -0800 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2009-12-13 20:20:19 +0100 |
| commit | 32188a03dae09c8a02bc72f26ece4a98183cc787 (patch) | |
| tree | 65801af8c3f32f6a946420a9f0d959b1696042b4 /target-mips/translate.c | |
| parent | 79ef2c4cdbe73955b1394f0fd9517c5a79e0455e (diff) | |
| download | qemu-32188a03dae09c8a02bc72f26ece4a98183cc787.tar.gz | |
target-mips: change interrupt bits to be mips16-aware
We need to stash the operating mode into the low bit of the error PC and
restore it on return from interrupts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/translate.c')
0 files changed, 0 insertions, 0 deletions