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authorAnthony Liguori <aliguori@us.ibm.com>2013-06-28 11:48:09 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2013-06-28 11:48:09 -0500
commit8a9c98aedc1a3fb4dfbebeccc926e273df54f2ba (patch)
treeb800dd8b6131717bf397103ec4d7199f67ea0c5c /target-mips
parent36125631e79d53ffb9365740f43f386e2171d116 (diff)
parentc658b94f6e8c206c59d02aa6fbac285b86b53d2c (diff)
downloadqemu-8a9c98aedc1a3fb4dfbebeccc926e273df54f2ba.tar.gz
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber # Via Andreas Färber * afaerber/qom-cpu: (24 commits) cpu: Turn cpu_unassigned_access() into a CPUState hook hwaddr: Make hwaddr type usable beyond softmmu cpu: Change qemu_init_vcpu() argument to CPUState cpus: Change qemu_dummy_start_vcpu() argument to CPUState cpus: Change qemu_kvm_start_vcpu() argument to CPUState cpus: Change cpu_handle_guest_debug() argument to CPUState gdbstub: Set gdb_set_stop_cpu() argument to CPUState kvm: Change kvm_cpu_exec() argument to CPUState kvm: Change kvm_handle_internal_error() argument to CPUState cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks cpus: Change qemu_kvm_init_cpu_signals() argument to CPUState kvm: Change kvm_set_signal_mask() argument to CPUState cpus: Change qemu_kvm_wait_io_event() argument to CPUState cpus: Change cpu_thread_is_idle() argument to CPUState cpu: Change cpu_exit() argument to CPUState kvm: Change cpu_synchronize_state() argument to CPUState kvm: Change kvm_cpu_synchronize_state() argument to CPUState gdbstub: Simplify find_cpu() cpu: Guard cpu_{save,load}() definitions target-openrisc: Register VMStateDescription for OpenRISCCPU ...
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu-qom.h2
-rw-r--r--target-mips/cpu.c3
-rw-r--r--target-mips/cpu.h5
-rw-r--r--target-mips/op_helper.c13
-rw-r--r--target-mips/translate.c6
5 files changed, 20 insertions, 9 deletions
diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h
index 32e3cad7bf..a7ff9e6ee1 100644
--- a/target-mips/cpu-qom.h
+++ b/target-mips/cpu-qom.h
@@ -75,5 +75,7 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
#define ENV_OFFSET offsetof(MIPSCPU, env)
void mips_cpu_do_interrupt(CPUState *cpu);
+void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
#endif
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 5315f7bda0..b61e207317 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -48,7 +48,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
cpu_reset(CPU(cpu));
- qemu_init_vcpu(&cpu->env);
mcc->parent_realize(dev, errp);
}
@@ -80,6 +79,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->reset = mips_cpu_reset;
cc->do_interrupt = mips_cpu_do_interrupt;
+ cc->dump_state = mips_cpu_dump_state;
+ cpu_class_set_do_unassigned_access(cc, mips_cpu_unassigned_access);
}
static const TypeInfo mips_cpu_type_info = {
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 6e761e03b6..fa0f0d157f 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -493,8 +493,9 @@ void r4k_helper_tlbwr(CPUMIPSState *env);
void r4k_helper_tlbp(CPUMIPSState *env);
void r4k_helper_tlbr(CPUMIPSState *env);
-void cpu_unassigned_access(CPUMIPSState *env, hwaddr addr,
- int is_write, int is_exec, int unused, int size);
+void mips_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
+ bool is_write, bool is_exec, int unused,
+ unsigned size);
#endif
void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 3fa0d00cf9..f6838ecd5f 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2147,13 +2147,18 @@ void tlb_fill(CPUMIPSState *env, target_ulong addr, int is_write, int mmu_idx,
}
}
-void cpu_unassigned_access(CPUMIPSState *env, hwaddr addr,
- int is_write, int is_exec, int unused, int size)
+void mips_cpu_unassigned_access(CPUState *cs, hwaddr addr,
+ bool is_write, bool is_exec, int unused,
+ unsigned size)
{
- if (is_exec)
+ MIPSCPU *cpu = MIPS_CPU(cs);
+ CPUMIPSState *env = &cpu->env;
+
+ if (is_exec) {
helper_raise_exception(env, EXCP_IBE);
- else
+ } else {
helper_raise_exception(env, EXCP_DBE);
+ }
}
#endif /* !CONFIG_USER_ONLY */
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 0a53203ce9..160c0c0922 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15780,9 +15780,11 @@ cpu_mips_check_sign_extensions (CPUMIPSState *env, FILE *f,
}
#endif
-void cpu_dump_state (CPUMIPSState *env, FILE *f, fprintf_function cpu_fprintf,
- int flags)
+void mips_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
+ int flags)
{
+ MIPSCPU *cpu = MIPS_CPU(cs);
+ CPUMIPSState *env = &cpu->env;
int i;
cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx