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authorThomas Huth <thuth@linux.vnet.ibm.com>2014-04-25 15:37:19 +0200
committerCornelia Huck <cornelia.huck@de.ibm.com>2014-05-07 10:17:35 +0200
commitc4400206d43b6a235299c7047cca0af93269fc03 (patch)
tree4e2f65ba44e4bb428aca4924356e73acd71aeb0c /target-s390x/cpu.h
parent422f32c5b12e392676017e637a0ebeaae194faab (diff)
downloadqemu-c4400206d43b6a235299c7047cca0af93269fc03.tar.gz
s390x/helper: Added format control bit to MMU translation
With the EDAT-1 facility, the MMU translation can stop at the segment table already, pointing to a 1 MB block. And while we're at it, move the page table entry handling to a separate function, too, as suggested by Alexander Graf. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Diffstat (limited to 'target-s390x/cpu.h')
-rw-r--r--target-s390x/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 41903a93fb..aad277af49 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -270,6 +270,9 @@ typedef struct CPUS390XState {
#define FLAG_MASK_64 (PSW_MASK_64 >> 32)
#define FLAG_MASK_32 0x00001000
+/* Control register 0 bits */
+#define CR0_EDAT 0x0000000000800000ULL
+
static inline int cpu_mmu_index (CPUS390XState *env)
{
if (env->psw.mask & PSW_MASK_PSTATE) {
@@ -927,6 +930,7 @@ struct sysib_322 {
#define _REGION_ENTRY_LENGTH 0x03 /* region third length */
#define _SEGMENT_ENTRY_ORIGIN ~0x7ffULL /* segment table origin */
+#define _SEGMENT_ENTRY_FC 0x400 /* format control */
#define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */