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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-20 18:22:16 +0000 |
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| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-20 18:22:16 +0000 |
| commit | fb79ceb91a6ff9ee52265893f9d66dd6833726da (patch) | |
| tree | 8d8b0e4c325653ca076f76edc1f81e4391ce5486 /target-sparc/cpu.h | |
| parent | cb3df91a7102a79c28bb39113ef1454c342c2c7c (diff) | |
| download | qemu-fb79ceb91a6ff9ee52265893f9d66dd6833726da.tar.gz | |
Make UA200x features selectable, add MMU types
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/cpu.h')
| -rw-r--r-- | target-sparc/cpu.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 9121682e74..676aac6130 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -238,6 +238,7 @@ typedef struct CPUSPARCState { uint64_t itlb_tte[64]; uint64_t dtlb_tag[64]; uint64_t dtlb_tte[64]; + uint32_t mmu_version; #else uint32_t mmuregs[32]; uint64_t mxccdata[4]; @@ -285,6 +286,9 @@ typedef struct CPUSPARCState { #define CPU_FEATURE_VIS1 (1 << 8) #define CPU_FEATURE_VIS2 (1 << 9) #define CPU_FEATURE_FSMULD (1 << 10) +#define CPU_FEATURE_HYPV (1 << 11) +#define CPU_FEATURE_CMT (1 << 12) +#define CPU_FEATURE_GL (1 << 13) #ifndef TARGET_SPARC64 #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | \ CPU_FEATURE_MUL | CPU_FEATURE_DIV | \ @@ -296,6 +300,12 @@ typedef struct CPUSPARCState { CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT | \ CPU_FEATURE_FMUL | CPU_FEATURE_VIS1 | \ CPU_FEATURE_VIS2 | CPU_FEATURE_FSMULD) +enum { + mmu_us_12, // Ultrasparc < III (64 entry TLB) + mmu_us_3, // Ultrasparc III (512 entry TLB) + mmu_us_4, // Ultrasparc IV (several TLBs, 32 and 256MB pages) + mmu_sun4v, // T1, T2 +}; #endif #if defined(TARGET_SPARC64) |