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authorPeter Maydell <peter.maydell@linaro.org>2017-08-08 13:42:52 +0100
committerRichard Henderson <richard.henderson@linaro.org>2017-09-07 11:15:55 -0700
commit6ad4d7eed05a1e23537fc92b50f898f5977f37e6 (patch)
tree68274ea648323ca49a2fcd96b65ff1a65e251ec7 /target/alpha/cpu.h
parent99a92b9459c1197e58036ab5a6f3ac6a5119b2ad (diff)
downloadqemu-6ad4d7eed05a1e23537fc92b50f898f5977f37e6.tar.gz
target/alpha: Switch to do_transaction_failed() hook
Switch the alpha target from the old unassigned_access hook to the new do_transaction_failed hook. This allows us to resolve a ??? in the old hook implementation. The only part of the alpha target that does physical memory accesses is reading the page table -- add a TODO comment there to the effect that we should handle bus faults on page table walks. (Since the palcode doesn't actually do anything useful on a bus fault anyway it's a bit moot for now.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <1502196172-13818-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/alpha/cpu.h')
-rw-r--r--target/alpha/cpu.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 0738e97d6d..6ae240969b 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -486,9 +486,11 @@ void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
uint64_t cpu_alpha_load_gr(CPUAlphaState *env, unsigned reg);
void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val);
#ifndef CONFIG_USER_ONLY
-QEMU_NORETURN void alpha_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
- bool is_write, bool is_exec,
- int unused, unsigned size);
+void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
+ vaddr addr, unsigned size,
+ MMUAccessType access_type,
+ int mmu_idx, MemTxAttrs attrs,
+ MemTxResult response, uintptr_t retaddr);
#endif
static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,