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| author | Paolo Bonzini <pbonzini@redhat.com> | 2017-03-01 10:34:48 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2017-06-07 18:22:02 +0200 |
| commit | f8c45c6550b9ff1e1f0b92709ff3213a79870879 (patch) | |
| tree | a50a83c59f416259a423493cc996646bbeca1f7e /target/i386/cpu.h | |
| parent | c8bc83a4dd29a9a33f5be81686bfe6e2e628097b (diff) | |
| download | qemu-f8c45c6550b9ff1e1f0b92709ff3213a79870879.tar.gz | |
target/i386: use multiple CPU AddressSpaces
This speeds up SMM switches. Later on it may remove the need to take
the BQL, and it may also allow to reuse code between TCG and KVM.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 0facb354b5..de0551f775 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1451,6 +1451,16 @@ int x86_cpu_handle_mmu_fault(CPUState *cpu, vaddr addr, void x86_cpu_set_a20(X86CPU *cpu, int a20_state); #ifndef CONFIG_USER_ONLY +static inline int x86_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs) +{ + return !!attrs.secure; +} + +static inline AddressSpace *cpu_addressspace(CPUState *cs, MemTxAttrs attrs) +{ + return cpu_get_address_space(cs, cpu_asidx_from_attrs(cs, attrs)); +} + uint8_t x86_ldub_phys(CPUState *cs, hwaddr addr); uint32_t x86_lduw_phys(CPUState *cs, hwaddr addr); uint32_t x86_ldl_phys(CPUState *cs, hwaddr addr); @@ -1653,7 +1663,6 @@ void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw); /* smm_helper.c */ void do_smm_enter(X86CPU *cpu); -void cpu_smm_update(X86CPU *cpu); /* apic.c */ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access); |