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| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2016-08-10 11:57:59 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-07-04 09:22:20 +0200 |
| commit | faa48d742c2133ec1795d2086be14178c785024a (patch) | |
| tree | 864dd81d1c5706b11c586316be0d6b35594bc3f3 /target/microblaze/translate.c | |
| parent | 5c8f44b7dbdec77eff2ed3e239ea31d649894932 (diff) | |
| download | qemu-faa48d742c2133ec1795d2086be14178c785024a.tar.gz | |
target-microblaze: dec_barrel: Add BSEFI
Add support for BSEFI.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/translate.c')
| -rw-r--r-- | target/microblaze/translate.c | 42 |
1 files changed, 30 insertions, 12 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 6ee488581a..3fad13c719 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -660,7 +660,8 @@ static void dec_div(DisasContext *dc) static void dec_barrel(DisasContext *dc) { TCGv t0; - bool s, t; + unsigned int imm_w, imm_s; + bool s, t, e = false; if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) @@ -670,27 +671,44 @@ static void dec_barrel(DisasContext *dc) return; } + if (dc->type_b) { + /* Insert and extract are only available in immediate mode. */ + e = extract32(dc->imm, 14, 1); + } s = extract32(dc->imm, 10, 1); t = extract32(dc->imm, 9, 1); + imm_w = extract32(dc->imm, 6, 5); + imm_s = extract32(dc->imm, 0, 5); - LOG_DIS("bs%s%s r%d r%d r%d\n", + LOG_DIS("bs%s%s%s r%d r%d r%d\n", + e ? "e" : "", s ? "l" : "r", t ? "a" : "l", dc->rd, dc->ra, dc->rb); - t0 = tcg_temp_new(); + if (e) { + if (imm_w + imm_s > 32 || imm_w == 0) { + /* These inputs have an undefined behavior. */ + qemu_log_mask(LOG_GUEST_ERROR, "bsefi: Bad input w=%d s=%d\n", + imm_w, imm_s); + } else { + tcg_gen_extract_i32(cpu_R[dc->rd], cpu_R[dc->ra], imm_s, imm_w); + } + } else { + t0 = tcg_temp_new(); - tcg_gen_mov_tl(t0, *(dec_alu_op_b(dc))); - tcg_gen_andi_tl(t0, t0, 31); + tcg_gen_mov_tl(t0, *(dec_alu_op_b(dc))); + tcg_gen_andi_tl(t0, t0, 31); - if (s) { - tcg_gen_shl_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); - } else { - if (t) { - tcg_gen_sar_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + if (s) { + tcg_gen_shl_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); } else { - tcg_gen_shr_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + if (t) { + tcg_gen_sar_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + } else { + tcg_gen_shr_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + } } + tcg_temp_free(t0); } - tcg_temp_free(t0); } static void dec_bit(DisasContext *dc) |