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| author | Richard Henderson <rth@twiddle.net> | 2016-04-05 18:00:33 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-02-14 08:15:00 +1100 |
| commit | a01deb36a685365b4a3117112da3cc4f0f79e955 (patch) | |
| tree | 5b5c12ab0b7d9437f55f4efb452d51f66f6f6337 /target/openrisc/cpu.h | |
| parent | 24c328521b19aff2559118809ddf0522d6dfaaea (diff) | |
| download | qemu-a01deb36a685365b4a3117112da3cc4f0f79e955.tar.gz | |
target/openrisc: Tidy handling of delayed branches
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/openrisc/cpu.h')
| -rw-r--r-- | target/openrisc/cpu.h | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 82946369dc..50a36ba8ef 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -83,9 +83,6 @@ enum { /* Version Register */ #define SPR_VR 0xFFFF003F -/* Internal flags, delay slot flag */ -#define D_FLAG 1 - /* Interrupt */ #define NR_IRQS 32 @@ -298,8 +295,7 @@ typedef struct CPUOpenRISCState { target_ulong lock_addr; target_ulong lock_value; - uint32_t flags; /* cpu_flags, we only use it for exception - in solt so far. */ + uint32_t dflag; /* In delay slot (boolean) */ /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; @@ -392,14 +388,16 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, #include "exec/cpu-all.h" +#define TB_FLAGS_DFLAG 1 +#define TB_FLAGS_OVE SR_OVE + static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) { *pc = env->pc; *cs_base = 0; - /* D_FLAG -- branch instruction exception, OVE overflow trap enable. */ - *flags = (env->flags & D_FLAG) | (env->sr & SR_OVE); + *flags = env->dflag | (env->sr & SR_OVE); } static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch) |