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| author | David Gibson <david@gibson.dropbear.id.au> | 2017-03-02 12:13:07 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-03-03 11:30:59 +1100 |
| commit | 0922f1e4872656f7643fb2bc8459bea6964de085 (patch) | |
| tree | 99030a4a7ad4fa6d21347e3fd2a6dcd72ddbdcb3 /target/ppc/cpu-qom.h | |
| parent | eaa477ca4ef59eed2c77d81937b981ff823def3b (diff) | |
| download | qemu-0922f1e4872656f7643fb2bc8459bea6964de085.tar.gz | |
target/ppc/POWER9: Add POWERPC_MMU_V3 bit
For easier handling of future processors using the POWER9 or something
close to it, add a new bit in the MMU model. This was originally from a
revised version of 86cf1e9 "target/ppc/POWER9: Add ISAv3.00 MMU definition"
but the older version of the patch was already merged. This makes the
change on top of the original version.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/cpu-qom.h')
| -rw-r--r-- | target/ppc/cpu-qom.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 4e3132b56b..da7eb5a6d6 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -71,6 +71,7 @@ enum powerpc_mmu_t { #define POWERPC_MMU_1TSEG 0x00020000 #define POWERPC_MMU_AMR 0x00040000 #define POWERPC_MMU_64K 0x00080000 +#define POWERPC_MMU_V3 0x00100000 /* ISA V3.00 MMU Support */ /* 64 bits PowerPC MMU */ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001, /* Architecture 2.03 and later (has LPCR) */ @@ -92,7 +93,8 @@ enum powerpc_mmu_t { /* Architecture 3.00 variant */ POWERPC_MMU_3_00 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG | POWERPC_MMU_64K - | POWERPC_MMU_AMR | 0x00000005, + | POWERPC_MMU_AMR | POWERPC_MMU_V3 + | 0x00000005, }; /*****************************************************************************/ |