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authorNikunj A Dadhania <nikunj@linux.vnet.ibm.com>2017-02-27 10:27:59 +0530
committerDavid Gibson <david@gibson.dropbear.id.au>2017-03-01 11:23:39 +1100
commit61aa9a697a1ec9b102e86cb7ea96876e6f20afe3 (patch)
tree4d3af66d18fc79c1770d2c263719e20150333977 /target/ppc/translate.c
parent1480d71cbe811d453b393e3b342f102535fe1202 (diff)
downloadqemu-61aa9a697a1ec9b102e86cb7ea96876e6f20afe3.tar.gz
target/ppc: add ov32 flag for multiply low insns
For Multiply Word: SO, OV, and OV32 bits reflects overflow of the 32-bit result For Multiply DoubleWord: SO, OV, and OV32 bits reflects overflow of the 64-bit result Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate.c')
-rw-r--r--target/ppc/translate.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index d4d9941f08..ccf3bff817 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1285,6 +1285,9 @@ static void gen_mullwo(DisasContext *ctx)
tcg_gen_sari_i32(t0, t0, 31);
tcg_gen_setcond_i32(TCG_COND_NE, t0, t0, t1);
tcg_gen_extu_i32_tl(cpu_ov, t0);
+ if (is_isa300(ctx)) {
+ tcg_gen_mov_tl(cpu_ov32, cpu_ov);
+ }
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
tcg_temp_free_i32(t0);
@@ -1346,6 +1349,9 @@ static void gen_mulldo(DisasContext *ctx)
tcg_gen_sari_i64(t0, t0, 63);
tcg_gen_setcond_i64(TCG_COND_NE, cpu_ov, t0, t1);
+ if (is_isa300(ctx)) {
+ tcg_gen_mov_tl(cpu_ov32, cpu_ov);
+ }
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
tcg_temp_free_i64(t0);