diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2011-11-26 15:48:41 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2017-01-16 19:19:03 -0800 |
| commit | 3a3c9dc4ca2eaa612cbd5d4c85d674b15eadfb02 (patch) | |
| tree | d64a088bd5188f6b19fe1fcd341283140f5fcc0e /target/xtensa/cpu.c | |
| parent | 8b912ff033cbc2e58476dfdc00fa2b8529c9eb96 (diff) | |
| download | qemu-3a3c9dc4ca2eaa612cbd5d4c85d674b15eadfb02.tar.gz | |
target-xtensa: implement RER/WER instructions
RER and WER are privileged instructions for accessing external
registers. External register address space is local to processor core.
There's no alignment requirements, addressable units are 32-bit wide
registers.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/cpu.c')
| -rw-r--r-- | target/xtensa/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 811d8780d6..cd7f95823f 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -127,6 +127,12 @@ static void xtensa_cpu_initfn(Object *obj) cs->env_ptr = env; env->config = xcc->config; + env->address_space_er = g_malloc(sizeof(*env->address_space_er)); + env->system_er = g_malloc(sizeof(*env->system_er)); + memory_region_init_io(env->system_er, NULL, NULL, env, "er", + UINT64_C(0x100000000)); + address_space_init(env->address_space_er, env->system_er, "ER"); + if (tcg_enabled() && !tcg_inited) { tcg_inited = true; xtensa_translate_init(); |