diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-07-24 07:16:00 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-08-24 11:10:54 -0700 |
| commit | 609ad70562793937257c89d07bf7c1370b9fc9aa (patch) | |
| tree | fd10a7febb6cfe6934d301b2b2dc7b675bade774 /tcg/sparc | |
| parent | 870ad1547ac53bc79c21d86cf453b3b20cc660a2 (diff) | |
| download | qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.tar.gz | |
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Rather than allow arbitrary shift+trunc, only concern ourselves
with low and high parts. This is all that was being used anyway.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/sparc')
| -rw-r--r-- | tcg/sparc/tcg-target.c | 14 | ||||
| -rw-r--r-- | tcg/sparc/tcg-target.h | 3 |
2 files changed, 9 insertions, 8 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index fe75af08dc..87f9bcca4b 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1415,12 +1415,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext32u_i64: tcg_out_arithi(s, a0, a1, 0, SHIFT_SRL); break; - case INDEX_op_trunc_shr_i64_i32: - if (a2 == 0) { - tcg_out_mov(s, TCG_TYPE_I32, a0, a1); - } else { - tcg_out_arithi(s, a0, a1, a2, SHIFT_SRLX); - } + case INDEX_op_extrl_i64_i32: + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + break; + case INDEX_op_extrh_i64_i32: + tcg_out_arithi(s, a0, a1, 32, SHIFT_SRLX); break; case INDEX_op_brcond_i64: @@ -1537,7 +1536,8 @@ static const TCGTargetOpDef sparc_op_defs[] = { { INDEX_op_ext32u_i64, { "R", "R" } }, { INDEX_op_ext_i32_i64, { "R", "r" } }, { INDEX_op_extu_i32_i64, { "R", "r" } }, - { INDEX_op_trunc_shr_i64_i32, { "r", "R" } }, + { INDEX_op_extrl_i64_i32, { "r", "R" } }, + { INDEX_op_extrh_i64_i32, { "r", "R" } }, { INDEX_op_brcond_i64, { "RZ", "RJ" } }, { INDEX_op_setcond_i64, { "R", "RZ", "RJ" } }, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 336c47fbd2..2cd72d2d41 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -118,7 +118,8 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 -#define TCG_TARGET_HAS_trunc_shr_i64_i32 1 +#define TCG_TARGET_HAS_extrl_i64_i32 1 +#define TCG_TARGET_HAS_extrh_i64_i32 1 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 0 #define TCG_TARGET_HAS_rot_i64 0 |