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| author | David Gibson <david@gibson.dropbear.id.au> | 2016-10-19 15:00:21 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-10-28 09:38:27 +1100 |
| commit | f775f45ab866f8e2d26720de9cb3c8f0ba5684d3 (patch) | |
| tree | 2bf82d643d259dc9c9c7ac14d75c2762d57bb678 /tests/libqos/pci.h | |
| parent | 9c268f8ae84ae18679ba2c3b16394e1828e9a006 (diff) | |
| download | qemu-f775f45ab866f8e2d26720de9cb3c8f0ba5684d3.tar.gz | |
libqos: Add 64-bit PCI IO accessors
Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32
bit reads and writes. It's likely that we'll want 64-bit accesses in the
future (plenty of modern peripherals will have 64-bit reigsters). This
adds them.
For PIO (not MMIO) accesses on the PC backend, this is implemented as two
32-bit ins or outs. That's not ideal but AFAICT x86 doesn't have 64-bit
versions of in and out.
This patch also converts the single current user of 64-bit accesses -
virtio-pci.c to use the new mechanism, rather than a sequence of 8 byte
reads.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'tests/libqos/pci.h')
| -rw-r--r-- | tests/libqos/pci.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tests/libqos/pci.h b/tests/libqos/pci.h index ce6ed08f2a..531e3f79e9 100644 --- a/tests/libqos/pci.h +++ b/tests/libqos/pci.h @@ -26,10 +26,12 @@ struct QPCIBus { uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr); uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr); uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr); + uint64_t (*pio_readq)(QPCIBus *bus, uint32_t addr); void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value); void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value); void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value); + void (*pio_writeq)(QPCIBus *bus, uint32_t addr, uint64_t value); void (*memread)(QPCIBus *bus, uint32_t addr, void *buf, size_t len); void (*memwrite)(QPCIBus *bus, uint32_t addr, const void *buf, size_t len); @@ -82,10 +84,12 @@ void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value); uint8_t qpci_io_readb(QPCIDevice *dev, void *data); uint16_t qpci_io_readw(QPCIDevice *dev, void *data); uint32_t qpci_io_readl(QPCIDevice *dev, void *data); +uint64_t qpci_io_readq(QPCIDevice *dev, void *data); void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value); void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value); void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value); +void qpci_io_writeq(QPCIDevice *dev, void *data, uint64_t value); void qpci_memread(QPCIDevice *bus, void *data, void *buf, size_t len); void qpci_memwrite(QPCIDevice *bus, void *data, const void *buf, size_t len); |