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path: root/accel/tcg/translate-all.c
AgeCommit message (Expand)AuthorFilesLines
2018-04-11icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk1-13/+14
2018-03-26tcg: Really fix cpu_io_recompileRichard Henderson1-27/+10
2018-03-12tcg: fix cpu_io_recompilePavel Dovgalyuk1-3/+15
2018-01-23page_unprotect(): handle calls to pages that are PAGE_WRITEPeter Maydell1-19/+31
2017-12-18misc: remove duplicated includesPhilippe Mathieu-Daudé1-1/+0
2017-12-18translate-all: fix 'consisits' typo in commentEmilio G. Cota1-1/+1
2017-11-13accel/tcg/translate-all: expand cpu_restore_state addr checkAlex Bennée1-23/+29
2017-10-24translate-all: exit from tb_phys_invalidate if qht_remove failsEmilio G. Cota1-1/+3
2017-10-24tcg: enable multiple TCG contexts in softmmuEmilio G. Cota1-1/+1
2017-10-24tcg: introduce regions to split code_gen_bufferEmilio G. Cota1-43/+20
2017-10-24translate-all: use qemu_protect_rwx/none helpersEmilio G. Cota1-48/+13
2017-10-24tcg: distribute profiling counters across TCGContext'sEmilio G. Cota1-10/+13
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota1-54/+55
2017-10-24tcg: take tb_ctx out of TCGContextEmilio G. Cota1-29/+28
2017-10-24translate-all: report correct avg host TB sizeEmilio G. Cota1-9/+23
2017-10-24exec-all: rename tb_free to tb_removeEmilio G. Cota1-3/+3
2017-10-24translate-all: use a binary search tree to track TBs in TBContextEmilio G. Cota1-108/+113
2017-10-24tcg: Remove CF_IGNORE_ICOUNTRichard Henderson1-3/+0
2017-10-24tcg: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota1-0/+1
2017-10-24tcg: Add CPUState cflags_next_tbRichard Henderson1-26/+10
2017-10-24tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASKEmilio G. Cota1-4/+9
2017-10-16tcg: Fix off-by-one in assert in page_set_flagsRichard Henderson1-1/+1
2017-10-10exec-all: extract tb->tc_* into a separate struct tc_tbEmilio G. Cota1-12/+12
2017-10-10translate-all: define and use DEBUG_TB_CHECK_GATEEmilio G. Cota1-6/+22
2017-10-10translate-all: define and use DEBUG_TB_INVALIDATE_GATEEmilio G. Cota1-3/+9
2017-10-10exec-all: introduce TB_PAGE_ADDR_FMTEmilio G. Cota1-2/+1
2017-10-10translate-all: define and use DEBUG_TB_FLUSH_GATEEmilio G. Cota1-7/+13
2017-10-10exec-all: bring tb->invalid into tb->cflagsEmilio G. Cota1-2/+1
2017-10-10translate-all: make have_tb_lock staticEmilio G. Cota1-1/+1
2017-10-10tcg: fix corruption of code_time profiling counter upon tb_flushEmilio G. Cota1-2/+2
2017-10-10cputlb: bring back tlb_flush_count under !TLB_DEBUGEmilio G. Cota1-1/+1
2017-09-07tcg: Infrastructure for managing constant poolsRichard Henderson1-1/+21
2017-09-07tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.hRichard Henderson1-7/+7
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova1-1/+1
2017-07-17exec: [tcg] Use different TBs according to the vCPU's dynamic tracing stateLluís Vilanova1-2/+9
2017-07-14translate-all: remove redundant !tcg_enabled check in dump_exec_infoEmilio G. Cota1-5/+0
2017-07-09tcg/aarch64: Use ADRP+ADD to compute target addressPranith Kumar1-1/+1
2017-07-04monitor: disable "info jit" and "info opcount" if !TCGPaolo Bonzini1-0/+5
2017-07-04tcg: make tcg_allowed globalYang Zhong1-5/+1
2017-07-04tcg: move page_size_init() functionYang Zhong1-18/+0
2017-07-04cpu: Introduce a wrapper for tlb_flush() that can be used in common codeThomas Huth1-0/+8
2017-06-30tcg: consistently access cpu->tb_jmp_cache atomicallyEmilio G. Cota1-14/+12
2017-06-22Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into stagingPeter Maydell1-20/+26
2017-06-15tcg: move tcg backend files into accel/tcg/Yang Zhong1-0/+2221
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