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path: root/hw/ppc/pnv.c
AgeCommit message (Expand)AuthorFilesLines
2018-04-27target/ppc: Fold slb_nr into PPCHash64OptionsDavid Gibson1-1/+1
2018-04-27target/ppc: Move 1T segment and AMR options to PPCHash64OptionsDavid Gibson1-1/+2
2018-04-27target/ppc: Pass cpu instead of env to ppc_create_page_sizes_prop()David Gibson1-2/+2
2018-04-26serial-isa: Use MAX_ISA_SERIAL_PORTS instead of MAX_SERIAL_PORTSPeter Maydell1-1/+1
2018-01-17ppc/pnv: change initrd addressCédric Le Goater1-1/+1
2018-01-17ppc/pnv: fix XSCOM core addressing on POWER9Cédric Le Goater1-7/+8
2018-01-17ppc/pnv: change core mask for POWER9Cédric Le Goater1-2/+2
2018-01-17ppc/pnv: use POWER9 DD2 processorCédric Le Goater1-1/+1
2018-01-10ppc/pnv: change powernv_ prefix to pnv_ for overall naming consistencyCédric Le Goater1-49/+45
2017-12-18hw/timer/mc146818: rename rtc_init() -> mc146818_rtc_init()Philippe Mathieu-Daudé1-1/+1
2017-10-17ppc: pnv: consolidate type definitions and batch register themIgor Mammedov1-58/+34
2017-10-17ppc: pnv: drop PnvChipClass::cpu_model fieldIgor Mammedov1-12/+13
2017-10-17ppc: pnv: normalize core/chip type namesIgor Mammedov1-1/+1
2017-10-17ppc: pnv: use generic cpu_model parsingIgor Mammedov1-12/+10
2017-10-17hw/ppc: use 0 instead of fdt_path_offset(fdt, "/")Greg Kurz1-2/+1
2017-09-27ppc/pnv: check for OPAL firmware file presenceCédric Le Goater1-1/+5
2017-07-13Convert error_report() to warn_report()Alistair Francis1-3/+3
2017-06-20object: use more specific property type namesMarc-André Lureau1-1/+1
2017-06-06ppc/pnv: check the return value of fdt_setprop()Cédric Le Goater1-2/+3
2017-05-15Merge remote-tracking branch 'dgibson/tags/ppc-for-2.10-20170511' into stagingStefan Hajnoczi1-1/+1
2017-05-11ppc/pnv: restrict BMC object to the BMC simulatorCédric Le Goater1-1/+1
2017-05-07Remove reduntant qemu: from error functionsIshani Chugh1-1/+1
2017-04-26ppc/pnv: generate an OEM SEL event on shutdownCédric Le Goater1-0/+14
2017-04-26ppc/pnv: add initial IPMI sensors for the BMC simulatorCédric Le Goater1-0/+21
2017-04-26ppc/pnv: populate device tree for IPMI BT devicesCédric Le Goater1-0/+35
2017-04-26ppc/pnv: populate device tree for serial devicesCédric Le Goater1-0/+33
2017-04-26ppc/pnv: populate device tree for RTC devicesCédric Le Goater1-0/+30
2017-04-26ppc/pnv: scan ISA bus to populate device treeCédric Le Goater1-0/+28
2017-04-26ppc/pnv: enable only one LPC busCédric Le Goater1-0/+22
2017-04-26ppc/pnv: Add support for POWER8+ LPC ControllerBenjamin Herrenschmidt1-40/+5
2017-04-26ppc/pnv: Add OCC model stub with interrupt supportBenjamin Herrenschmidt1-0/+13
2017-04-26ppc/pnv: Add cut down PSI bridge model and hookup external interruptCédric Le Goater1-6/+59
2017-04-26ppc/pnv: add memory regions for the ICP registersCédric Le Goater1-0/+81
2017-04-26ppc/pnv: create the ICP object under PnvCoreCédric Le Goater1-0/+2
2017-04-26ppc/pnv: extend the machine with a InterruptStatsProvider interfaceCédric Le Goater1-0/+17
2017-04-26ppc/pnv: extend the machine with a XICSFabric interfaceCédric Le Goater1-0/+30
2017-04-26hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devicesThomas Huth1-0/+1
2017-03-14qemu-timer: do not include sysemu/cpus.h from util/qemu-timer.hPaolo Bonzini1-0/+1
2017-02-22hw/ppc/pnv: Remove superfluous "qemu" prefix from error stringsThomas Huth1-3/+3
2017-02-02hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be foundThomas Huth1-3/+3
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-1/+1
2016-11-15ppc/pnv: Fix fatal bug on 32-bit hostsDavid Gibson1-1/+1
2016-11-15ppc/pnv: add a 'xscom_core_base' field to PnvChipClassCédric Le Goater1-1/+7
2016-11-15powernv: CPU compatibility modes don't make sense for powernvDavid Gibson1-5/+1
2016-10-28ppc/pnv: add a ISA busCédric Le Goater1-0/+65
2016-10-28ppc/pnv: add a LPC controllerBenjamin Herrenschmidt1-0/+8
2016-10-28ppc/pnv: add XSCOM handlers to PnvCoreCédric Le Goater1-0/+4
2016-10-28ppc/pnv: add XSCOM infrastructureCédric Le Goater1-0/+25
2016-10-28ppc/pnv: add a PnvCore objectCédric Le Goater1-1/+188
2016-10-28ppc/pnv: add a PIR handler to PnvChipCédric Le Goater1-0/+30
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