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path: root/target-alpha/translate.c
AgeCommit message (Expand)AuthorFilesLines
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-1/+1
2015-05-18target-alpha: Raise IOV from CVTQLRichard Henderson1-29/+5
2015-05-18target-alpha: Raise EXC_M_INV properly for fp inputsRichard Henderson1-0/+7
2015-05-18target-alpha: Disallow literal operand to 1C.30 to 1C.37Richard Henderson1-2/+17
2015-05-18target-alpha: Implement WH64ENRichard Henderson1-0/+4
2015-05-18target-alpha: Fix integer overflow checking insnsRichard Henderson1-7/+53
2015-05-18target-alpha: Raise IOV from CVTTQRichard Henderson1-13/+4
2015-05-18target-alpha: Set fpcr_exc_status even for disabled exceptionsRichard Henderson1-15/+13
2015-05-18target-alpha: Tidy FPCR representationRichard Henderson1-37/+8
2015-05-18target-alpha: Forget installed round mode after MT_FPCRRichard Henderson1-0/+5
2015-05-18target-alpha: Rename floating-point subroutinesRichard Henderson1-34/+34
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-2/+2
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-7/+7
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson1-1/+1
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-1/+1
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini1-4/+4
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova1-0/+3
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-0/+1
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-3/+2
2014-05-02target-alpha: Fix RDUSPRichard Henderson1-1/+1
2014-04-17target-alpha: Remove cpu_unique, cpu_sysval, cpu_uspRichard Henderson1-19/+18
2014-04-17target-alpha: Tidy alpha_translate_initRichard Henderson1-35/+43
2014-04-17target-alpha: Don't issue goto_tb under singlestepRichard Henderson1-1/+2
2014-04-17target-alpha: Use non-local temps for zero/sinkRichard Henderson1-2/+2
2014-04-17target-alpha: Use extract to get insn fieldsRichard Henderson1-27/+22
2014-04-17target-alpha: Convert mfpr/mtpr to source/sinkRichard Henderson1-33/+19
2014-04-17target-alpha: Convert gen_cpys et al to source/sinkRichard Henderson1-76/+24
2014-04-17target-alpha: Convert gen_fcvtlq/ql to source/sinkRichard Henderson1-50/+28
2014-04-17target-alpha: Convert gen_fcmov to source/sinkRichard Henderson1-30/+14
2014-04-17target-alpha: Convert gen_bcond to source/sinkRichard Henderson1-18/+6
2014-04-17target-alpha: Convert most ieee insns to source/sinkRichard Henderson1-52/+17
2014-04-17target-alpha: Convert gen_ieee_input to source/sinkRichard Henderson1-19/+13
2014-04-17target-alpha: Convert MVIOP2 to source/sinkRichard Henderson1-19/+4
2014-04-17target-alpha: Convert ARITH3 to source/sinkRichard Henderson1-69/+39
2014-04-17target-alpha: Convert FARITH3 to source/sinkRichard Henderson1-53/+12
2014-04-17target-alpha: Convert FARITH2 to source/sinkRichard Henderson1-32/+11
2014-04-17target-alpha: Convert gen_zap/not to source/sinkRichard Henderson1-30/+11
2014-04-17target-alpha: Convert gen_ins_h/l to source/sinkRichard Henderson1-61/+50
2014-04-17target-alpha: Convert gen_ext_h/l to source/sinkRichard Henderson1-40/+26
2014-04-17target-alpha: Convert gen_msk_h/l to source/sinkRichard Henderson1-28/+19
2014-04-17target-alpha: Convert gen_cmov to source/sinkRichard Henderson1-44/+22
2014-04-17target-alpha: Convert ARITH3_EX to source/sinkRichard Henderson1-43/+6
2014-04-17target-alpha: Convert gen_cmp to source/sinkRichard Henderson1-35/+5
2014-04-17target-alpha: Convert gen_store_conditional to source/sinkRichard Henderson1-5/+1
2014-04-17target-alpha: Convert gen_load/store_mem to source/sinkRichard Henderson1-38/+29
2014-04-17target-alpha: Convert opcode 0x1F to source/sinkRichard Henderson1-20/+10
2014-04-17target-alpha: Convert opcode 0x1E to source/sinkRichard Henderson1-2/+4
2014-04-17target-alpha: Convert opcode 0x1C to source/sinkRichard Henderson1-54/+19
2014-04-17target-alpha: Convert opcode 0x1B to source/sinkRichard Henderson1-19/+13
2014-04-17target-alpha: Convert opcode 0x1A to source/sinkRichard Henderson1-5/+4
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