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path: root/target-arm/helper.c
AgeCommit message (Expand)AuthorFilesLines
2014-04-17target-arm: Implement auxiliary fault status registersPeter Maydell1-0/+9
2014-04-17target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8Peter Maydell1-5/+91
2014-04-17target-arm: Don't expose wildcard ID register definitions for ARMv8Peter Maydell1-18/+43
2014-04-17target-arm: Implement ISR_EL1 registerPeter Maydell1-0/+18
2014-04-17target-arm: Implement AArch64 view of ACTLRPeter Maydell1-1/+2
2014-04-17target-arm: Implement AArch64 view of CONTEXTIDRPeter Maydell1-15/+18
2014-04-17target-arm: Implement AArch64 views of AArch32 ID registersPeter Maydell1-29/+44
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell1-0/+12
2014-04-17target-arm: Move arm_log_exception() into internals.hPeter Maydell1-31/+0
2014-04-17target-arm: Implement AArch64 SPSR_EL1Peter Maydell1-0/+4
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell1-0/+34
2014-04-17target-arm: Add AArch64 ELR_EL1 register.Peter Maydell1-0/+4
2014-04-17target-arm: Implement AArch64 views of fault status and data registersRob Herring1-13/+25
2014-04-17target-arm: Use dedicated CPU state fields for ARM946 access bit registersPeter Maydell1-10/+14
2014-04-17target-arm: A64: Implement DC ZVAPeter Maydell1-5/+117
2014-04-17target-arm: Don't mention PMU in debug feature registerPeter Maydell1-1/+6
2014-04-17target-arm: Add v8 mmu translation supportRob Herring1-32/+77
2014-04-17target-arm: Provide syndrome information for MMU faultsRob Herring1-0/+12
2014-04-17target-arm: Define exception record for AArch64 exceptionsPeter Maydell1-9/+14
2014-04-17target-arm: Implement AArch64 DAIF system registerPeter Maydell1-0/+20
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell1-0/+1
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée1-27/+106
2014-03-17target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée1-35/+163
2014-03-17target-arm: Add ARM_CP_IO notation to PMCR reginfoPeter Maydell1-0/+1
2014-03-15misc: Fix typos in commentsStefan Weil1-1/+1
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-10/+29
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber1-4/+10
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-10/+25
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-14/+11
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber1-4/+9
2014-03-13cpu: Factor out cpu_generic_init()Andreas Färber1-13/+1
2014-03-13target-arm: Clean up ENV_GET_CPU() usageAndreas Färber1-5/+7
2014-03-10target-arm: Implements the ARM PMCCNTR registerAlistair Francis1-4/+85
2014-03-10target-arm: Fix incorrect setting of E bit in CPSRPeter Maydell1-1/+1
2014-02-26target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton1-0/+39
2014-02-26target-arm: Implement AArch64 view of CPACRPeter Maydell1-1/+2
2014-02-26target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell1-12/+17
2014-02-26target-arm: Implement AArch64 OSLAR_EL1 sysreg as WIPeter Maydell1-0/+4
2014-02-26target-arm: Implement AArch64 dummy breakpoint and watchpoint registersPeter Maydell1-0/+32
2014-02-26target-arm: Implement AArch64 ID and feature registersPeter Maydell1-0/+45
2014-02-26target-arm: Implement AArch64 generic timersPeter Maydell1-11/+72
2014-02-26target-arm: Implement AArch64 MPIDRPeter Maydell1-2/+4
2014-02-26target-arm: Implement AArch64 TTBR*Peter Maydell1-59/+30
2014-02-26target-arm: Implement AArch64 VBAR_EL1Peter Maydell1-1/+8
2014-02-26target-arm: Implement AArch64 TCR_EL1Peter Maydell1-3/+16
2014-02-26target-arm: Implement AArch64 SCTLR_EL1Peter Maydell1-1/+2
2014-02-26target-arm: Implement AArch64 memory attribute registersPeter Maydell1-1/+23
2014-02-26target-arm: Implement AArch64 dummy MDSCR_EL1Peter Maydell1-0/+6
2014-02-26target-arm: Implement AArch64 TLB invalidate opsPeter Maydell1-0/+73
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