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path: root/target-arm/internals.h
AgeCommit message (Expand)AuthorFilesLines
2016-10-26target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}Emilio G. Cota1-3/+1
2016-07-12Fix confusing argument names in some common functionsSergey Sorokin1-2/+3
2016-06-17target-arm: Provide hook to tell GICv3 about changes of security statePeter Maydell1-0/+8
2016-06-06target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstepPeter Maydell1-3/+3
2016-05-19arm: move arm_log_exception into .c filePaolo Bonzini1-15/+0
2016-05-12target-arm: Split data abort syndrome generatorPeter Maydell1-3/+21
2016-02-18target-arm: Move bank_number() into internals.hPeter Maydell1-1/+25
2016-02-11target-arm: Implement checking of fired watchpointSergey Fedorov1-0/+3
2016-02-11target-arm: Correct misleading 'is_thumb' syn_* parameter namesPeter Maydell1-14/+14
2016-01-15target-arm: Use the right MMU index in arm_regime_using_lpae_formatAlvise Rigo1-2/+3
2015-12-17target-arm: raise exception on misaligned LDREX operandsAndrew Baumann1-0/+7
2015-11-03target-arm: Add and use symbolic names for register banksSoren Brinkmann1-3/+13
2015-10-27target-arm: Add ARMMMUFaultInfoEdgar E. Iglesias1-1/+14
2015-10-27target-arm: Add computation of starting level for S2 PTWEdgar E. Iglesias1-0/+25
2015-09-07target-arm: Wire up HLT 0xf000 as the A64 semihosting instructionPeter Maydell1-0/+2
2015-06-15arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite1-1/+2
2015-05-29target-arm: Move setting of exception info into tlb_fillPeter Maydell1-0/+3
2015-05-18target-arm: Add WFx syndrome functionGreg Bellows1-0/+6
2015-04-01target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc)Peter Maydell1-1/+4
2014-12-11target-arm: make TTBCR bankedFabian Aggeler1-3/+3
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows1-1/+1
2014-10-24target-arm: add emulation of PSCI calls for system emulationRob Herring1-0/+12
2014-10-24target-arm: Add support for A32 and T32 HVC and SMC insnsPeter Maydell1-0/+10
2014-09-29target-arm: Add support for VIRQ and VFIQEdgar E. Iglesias1-0/+2
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias1-0/+6
2014-09-29target-arm: Add a Hypervisor Trap exception typeEdgar E. Iglesias1-0/+1
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias1-0/+6
2014-09-29target-arm: Implement handling of breakpoint firingPeter Maydell1-0/+6
2014-09-29target-arm: Implement setting guest breakpointsPeter Maydell1-0/+9
2014-09-12target-arm: Implement handling of fired watchpointsPeter Maydell1-0/+9
2014-09-12target-arm: Move extended_addresses_enabled() to internals.hPeter Maydell1-0/+11
2014-09-12target-arm: Implement setting of watchpointsPeter Maydell1-0/+10
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell1-0/+6
2014-08-04target-arm: A64: Break out aarch64_save/restore_spEdgar E. Iglesias1-9/+20
2014-05-27target-arm: A64: Generalize update_spsel for the various ELsEdgar E. Iglesias1-5/+6
2014-05-27target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias1-0/+14
2014-04-17target-arm: Move arm_log_exception() into internals.hPeter Maydell1-0/+31
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell1-0/+25
2014-04-17target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell1-0/+7
2014-04-17target-arm: Provide syndrome information for MMU faultsRob Herring1-0/+13
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell1-0/+14
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell1-0/+128
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell1-0/+49