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path: root/target-arm/translate.c
AgeCommit message (Expand)AuthorFilesLines
2014-08-19target-arm: Implement ARMv8 single-stepping for AArch32 codePeter Maydell1-2/+74
2014-08-19target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell1-6/+7
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova1-0/+3
2014-06-09target-arm: Delete unused iwmmxt_msadb helperPeter Maydell1-2/+0
2014-06-09target-arm: A32/T32: Mask CRC value in calling code, not helperPeter Maydell1-0/+10
2014-06-09target-arm: add support for v8 VMULL.P64 instructionPeter Maydell1-1/+25
2014-06-09target-arm: Allow 3reg_wide undefreq to encode more bad size optionsPeter Maydell1-12/+12
2014-06-09target-arm: add support for v8 SHA1 and SHA256 instructionsArd Biesheuvel1-0/+84
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini1-0/+1
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-3/+2
2014-05-27target-arm: Add SPSR entries for EL2/HYP and EL3/MONEdgar E. Iglesias1-2/+2
2014-05-27target-arm: A32: Use get_mem_index for load/storesEdgar E. Iglesias1-106/+106
2014-05-27target-arm/translate.c: Use get_mem_index() for SRS memory accessesPeter Maydell1-2/+2
2014-05-27target-arm/translate.c: Clean up mmu index handling for ldrt/strtPeter Maydell1-12/+17
2014-04-17arm: translate.c: Fix smlald InstructionPeter Crosthwaite1-11/+23
2014-04-17target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell1-0/+5
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell1-2/+8
2014-04-17target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1Peter Maydell1-0/+31
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell1-38/+65
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell1-1/+44
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell1-0/+1
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée1-2/+10
2014-03-17target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée1-2/+10
2014-03-17target-arm: A64: Implement PMULL instructionPeter Maydell1-0/+1
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber1-2/+2
2014-03-10target-arm: Implement WFE as a yield operationPeter Maydell1-0/+6
2014-02-26target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton1-0/+56
2014-02-20target-arm: Remove unnecessary code now read/write fns can't failPeter Maydell1-4/+0
2014-02-20target-arm: Split cpreg access checks out from read/write functionsPeter Maydell1-0/+11
2014-02-20target-arm: Log bad system register accesses with LOG_UNIMPPeter Maydell1-0/+13
2014-02-08target-arm: Add support for AArch32 64bit VCVTB and VCVTTWill Newton1-22/+61
2014-01-31target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTMWill Newton1-1/+52
2014-01-31target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTMWill Newton1-0/+61
2014-01-31target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZWill Newton1-1/+39
2014-01-31target-arm: Add support for AArch32 SIMD VRINTXWill Newton1-1/+10
2014-01-31target-arm: Add support for AArch32 FP VRINTXWill Newton1-0/+11
2014-01-31target-arm: Add support for AArch32 FP VRINTZWill Newton1-0/+16
2014-01-31target-arm: Add support for AArch32 FP VRINTRWill Newton1-0/+11
2014-01-31target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTMWill Newton1-0/+54
2014-01-08target-arm: Rename A32 VFP conversion helpersWill Newton1-11/+13
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell1-8/+8
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell1-26/+39
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell1-3/+4
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf1-5/+9
2013-12-17target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell1-38/+24
2013-12-17target-arm: add support for v8 AES instructionsArd Biesheuvel1-0/+26
2013-12-10target-arm: Use new qemu_ld/st opcodesRichard Henderson1-31/+25
2013-12-10target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions.Will Newton1-9/+22
2013-12-10target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions.Will Newton1-0/+50