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peter/qemu
bdrv-getlength-conversion
block
block-dmg
block-dmg-2.2
block-dmg-2.3
block-dmg-2.3-v2
doc-updates
gdbstub-fixes
gtk-toggle-menubar
gtk-updates
logitech-unifying
logitech-unifying-2.2
master
serial-baud
slirp-fixes
usbdump-usbhid
QEMU hacking for Peter
Peter Wu
summary
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target-arm
Age
Commit message (
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Author
Files
Lines
2014-04-17
target-arm: Implement AArch64 address translation operations
Peter Maydell
2
-31
/
+25
2014-04-17
target-arm: Implement auxiliary fault status registers
Peter Maydell
1
-0
/
+9
2014-04-17
target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8
Peter Maydell
1
-5
/
+91
2014-04-17
target-arm: Don't expose wildcard ID register definitions for ARMv8
Peter Maydell
1
-18
/
+43
2014-04-17
target-arm: Remove THUMB2EE feature from AArch64 'any' CPU
Peter Maydell
1
-1
/
+0
2014-04-17
target-arm: Implement ISR_EL1 register
Peter Maydell
1
-0
/
+18
2014-04-17
target-arm: Implement AArch64 view of ACTLR
Peter Maydell
1
-1
/
+2
2014-04-17
target-arm: Implement AArch64 view of CONTEXTIDR
Peter Maydell
2
-16
/
+19
2014-04-17
target-arm: Implement AArch64 views of AArch32 ID registers
Peter Maydell
1
-29
/
+44
2014-04-17
target-arm: Add Cortex-A57 processor
Peter Maydell
1
-0
/
+43
2014-04-17
target-arm: Implement ARMv8 MVFR registers
Peter Maydell
5
-2
/
+23
2014-04-17
target-arm: Implement AArch64 EL1 exception handling
Rob Herring
6
-0
/
+143
2014-04-17
target-arm: Move arm_log_exception() into internals.h
Peter Maydell
2
-31
/
+31
2014-04-17
target-arm: Implement AArch64 SPSR_EL1
Peter Maydell
5
-11
/
+40
2014-04-17
target-arm: Implement SP_EL0, SP_EL1
Peter Maydell
6
-7
/
+100
2014-04-17
target-arm: Add AArch64 ELR_EL1 register.
Peter Maydell
4
-4
/
+24
2014-04-17
target-arm: Implement AArch64 views of fault status and data registers
Rob Herring
3
-18
/
+29
2014-04-17
target-arm: Use dedicated CPU state fields for ARM946 access bit registers
Peter Maydell
2
-10
/
+16
2014-04-17
target-arm: A64: Implement DC ZVA
Peter Maydell
6
-6
/
+128
2014-04-17
target-arm: Don't mention PMU in debug feature register
Peter Maydell
1
-1
/
+6
2014-04-17
target-arm: Add v8 mmu translation support
Rob Herring
1
-32
/
+77
2014-04-17
target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1
Peter Maydell
2
-1
/
+40
2014-04-17
target-arm: A64: Add assertion that FP access was checked
Peter Maydell
2
-24
/
+59
2014-04-17
target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set
Peter Maydell
5
-6
/
+320
2014-04-17
target-arm: Provide syndrome information for MMU faults
Rob Herring
2
-0
/
+25
2014-04-17
target-arm: Add support for generating exceptions with syndrome information
Peter Maydell
6
-54
/
+140
2014-04-17
target-arm: Provide correct syndrome information for cpreg access traps
Peter Maydell
5
-7
/
+184
2014-04-17
target-arm: Define exception record for AArch64 exceptions
Peter Maydell
3
-9
/
+32
2014-04-17
target-arm: Implement AArch64 DAIF system register
Peter Maydell
2
-1
/
+21
2014-04-17
target-arm: Split out private-to-target functions into internals.h
Peter Maydell
8
-20
/
+55
2014-03-27
target-arm: Add missing 'static' attribute
Stefan Weil
1
-1
/
+1
2014-03-24
target-arm: Fix A64 Neon MLS
Peter Maydell
1
-1
/
+1
2014-03-18
target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)
Alex Bennée
3
-10
/
+284
2014-03-18
target-arm: A64: Add saturating int ops (SQNEG/SQABS)
Alex Bennée
3
-12
/
+75
2014-03-17
target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
Alex Bennée
4
-37
/
+140
2014-03-17
target-arm: A64: Implement FCVTXN
Peter Maydell
3
-1
/
+43
2014-03-17
target-arm: A64: Implement scalar saturating narrow ops
Alex Bennée
1
-7
/
+28
2014-03-17
target-arm: A64: Move handle_2misc_narrow function
Alex Bennée
1
-90
/
+90
2014-03-17
target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
Alex Bennée
4
-42
/
+195
2014-03-17
target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
Peter Maydell
1
-2
/
+78
2014-03-17
target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
Peter Maydell
1
-0
/
+132
2014-03-17
target-arm: A64: Implement FRINT*
Peter Maydell
1
-3
/
+42
2014-03-17
target-arm: A64: Implement SRI
Peter Maydell
1
-8
/
+49
2014-03-17
target-arm: A64: Add FRECPX (reciprocal exponent)
Alex Bennée
3
-1
/
+130
2014-03-17
target-arm: A64: List unsupported shift-imm opcodes
Peter Maydell
1
-2
/
+11
2014-03-17
target-arm: A64: Implement FCVTL
Peter Maydell
1
-0
/
+47
2014-03-17
target-arm: A64: Implement FCVTN
Peter Maydell
1
-1
/
+23
2014-03-17
target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
Peter Maydell
1
-19
/
+169
2014-03-17
target-arm: A64: Implement SHLL, SHLL2
Peter Maydell
1
-1
/
+31
2014-03-17
target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
Peter Maydell
3
-1
/
+139
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