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path: root/target-i386/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2016-11-02x86: add AVX512_4VNNIW and AVX512_4FMAPS featuresLuwei Kang1-0/+4
2016-10-24pc: apic_common: Extend APIC ID property to 32bitIgor Mammedov1-0/+1
2016-10-07qemu-tech: document lazy condition code evaluation in cpu.hPaolo Bonzini1-0/+7
2016-09-27target-i386: Move xsave component mask to features arrayEduardo Habkost1-1/+2
2016-09-27target-i386: xsave: Calculate set of xsave components on realizeEduardo Habkost1-0/+1
2016-09-27target-i386: Automatically set level/xlevel/xlevel2 when neededEduardo Habkost1-3/+9
2016-09-27target-i386: Add a marker to end of the region zeroed on resetEduardo Habkost1-0/+1
2016-09-19target-i386: Use struct X86XSaveArea in fpu_helper.cRichard Henderson1-8/+2
2016-09-14target-i386: fix ordering of fields in CPUX86StatePaolo Bonzini1-6/+6
2016-09-09target-i386: present virtual L3 cache info for vcpusLongpeng(Mike)1-0/+6
2016-09-05target-i386: Add more Intel AVX-512 instructions supportLuwei Kang1-0/+5
2016-07-20target-i386: Add support for UMIP and RDPID CPUID bitsPaolo Bonzini1-0/+2
2016-07-20target-i386: Add socket/core/thread properties to X86CPUIgor Mammedov1-0/+4
2016-07-20target-i386: Set physical address bits based on hostDr. David Alan Gilbert1-0/+3
2016-07-20target-i386: Use uint32_t for X86CPU.apic_idIgor Mammedov1-1/+6
2016-07-20target-i386: Fill high bits of mtrr maskDr. David Alan Gilbert1-0/+3
2016-07-20target-i386: Allow physical address bits to be setDr. David Alan Gilbert1-0/+3
2016-07-20target-i386: Provide TCG_PHYS_ADDR_BITSDr. David Alan Gilbert1-2/+4
2016-07-19target-i386: Remove redundant HF_SOFTMMU_MASKSergey Fedorov1-3/+0
2016-07-12target-*: Clean up cpu.h header guardsMarkus Armbruster1-3/+4
2016-07-07target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfgHaozhong Zhang1-0/+4
2016-07-07target-i386: kvm: Add basic Intel LMCE supportAshok Raj1-0/+12
2016-07-07target-i386: Report hyperv feature words through qomEvgeny Yakovlev1-0/+3
2016-07-07pc: Parse CPU features only onceIgor Mammedov1-1/+0
2016-06-29target-*: Don't redefine cpu_exec()Peter Crosthwaite1-2/+0
2016-06-14target-i386: Implement CPUID[0xB] (Extended Topology Enumeration)Radim Krčmář1-0/+8
2016-05-23target-i386: kvm: Allocate kvm_msrs struct once per VCPUEduardo Habkost1-0/+4
2016-05-23cpu: Eliminate cpudef_init(), cpudef_setup()Eduardo Habkost1-2/+0
2016-05-23target-i386: Define structs for layout of xsave areaEduardo Habkost1-0/+95
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini1-2/+0
2016-05-19apic: move target-dependent definitions to cpu.hPaolo Bonzini1-0/+7
2016-05-19target-i386: make cpu-qom.h not target specificPaolo Bonzini1-1/+97
2016-05-18Fix some typos found by codespellStefan Weil1-1/+1
2016-05-12tb: consistently use uint32_t for tb->flagsEmilio G. Cota1-1/+1
2016-03-24target-i386: implement PKE for TCGPaolo Bonzini1-1/+5
2016-02-25Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-10/+19
2016-02-25target-i386: fix confusion in xcr0 bit position vs. maskPaolo Bonzini1-10/+19
2016-02-23all: Clean up includesPeter Maydell1-1/+0
2016-02-13target-i386: Enable control registers for MPXRichard Henderson1-1/+20
2016-01-21target-i386: Add PKU and and OSPKE supportHuaitong Han1-0/+7
2016-01-21target-i386: Add support to migrate vcpu's TSC rateHaozhong Zhang1-0/+1
2016-01-21target-i386: Add suffixes to MMReg struct fieldsEduardo Habkost1-33/+33
2016-01-21target-i386: Define MMREG_UNION macroEduardo Habkost1-16/+11
2016-01-21target-i386: Define MMXReg._d fieldEduardo Habkost1-1/+2
2016-01-21target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_*Eduardo Habkost1-12/+12
2016-01-21target-i386: Rename struct XMMReg to ZMMRegEduardo Habkost1-3/+3
2016-01-21target-i386: Use a _q array on MMXReg tooEduardo Habkost1-2/+2
2016-01-21target-i386: Rename optimize_flags_init()Eduardo Habkost1-1/+1
2015-12-17target-i386/kvm: Hyper-V SynIC timers MSR's supportAndrey Smetanin1-0/+2
2015-12-17target-i386/kvm: Hyper-V SynIC MSR's supportAndrey Smetanin1-0/+5
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