summaryrefslogtreecommitdiff
path: root/target-mips/helper.c
AgeCommit message (Expand)AuthorFilesLines
2014-12-17Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into stagingPeter Maydell1-4/+13
2014-12-16qemu-log: add log category for MMU infoAntony Pavlov1-2/+4
2014-12-16target-mips: remove excp_names[] from linux-user as it is unusedLeon Alrae1-1/+1
2014-12-16target-mips: Tighten ISA level checksMaciej W. Rozycki1-3/+12
2014-11-03target-mips: add MSA exceptionsYongbok Kim1-0/+10
2014-11-03target-mips: add BadInstr and BadInstrP supportLeon Alrae1-3/+42
2014-11-03target-mips: add TLBINV supportLeon Alrae1-1/+1
2014-11-03target-mips: add new Read-Inhibit and Execute-Inhibit exceptionsLeon Alrae1-1/+24
2014-11-03target-mips: add RI and XI fields to TLB entryLeon Alrae1-1/+10
2014-11-03target-mips: distinguish between data load and instruction fetchLeon Alrae1-11/+10
2014-09-25target-mips: Use cpu_exec_interrupt qom hookRichard Henderson1-0/+17
2014-06-18target-mips: get_physical_address: Add KVM awarenessJames Hogan1-7/+26
2014-06-18target-mips: get_physical_address: Add defines for segment basesJames Hogan1-6/+12
2014-03-27target-mips: Avoid shifting left into sign bitPeter Maydell1-4/+4
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber1-2/+6
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-14/+17
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber1-6/+9
2013-08-28target-mips: fix get_physical_address() #if 0 build errorJames Hogan1-1/+1
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber1-2/+5
2013-07-09log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber1-1/+1
2013-05-20linux-user: Save the correct resume address for MIPS signal handlingKwok Cheung Yeung1-2/+2
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-2/+3
2012-10-31target-mips: Add ASE DSP resources access checkJia Liu1-0/+3
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-9/+9
2012-06-04target-mips: Use cpu_reset() in do_interrupt()Andreas Färber1-1/+2
2012-03-14target-mips: Don't overuse CPUStateAndreas Färber1-12/+12
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-1/+1
2011-12-14Fix spelling in comments, documentation and messagesStefan Weil1-1/+1
2011-09-06mips: Correct VInt vector generationEdgar E. Iglesias1-3/+3
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-3/+3
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
2011-05-15target-mips: Fix warning caused by unused local variableAurelien Jarno1-8/+6
2010-08-06mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias1-0/+27
2010-07-17target-mips: fix xtlb exception for loongsonAurelien Jarno1-2/+4
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd1-6/+15
2010-03-17Large page TLB flushPaul Brook1-3/+4
2010-03-12Target specific usermode cleanupPaul Brook1-1/+4
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-4/+2
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno1-4/+4
2009-12-13target-mips: change interrupt bits to be mips16-awareNathan Froyd1-21/+30
2009-11-30target-mips: add a function to do virtual -> physical translationsAurelien Jarno1-0/+23
2009-11-30target-mips: split code raising MMU exception in a separate functionAurelien Jarno1-46/+53
2009-11-22target-mips: fix physical address type in MMU functionsAurelien Jarno1-7/+7
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-3/+3
2009-10-01Get rid of _t suffixmalc1-3/+3
2009-09-30target-mips: unmatched brackets in if 0Michael S. Tsirkin1-1/+0
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-05-13Include assert.h from qemu-common.hPaul Brook1-1/+0
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-25/+14
generated by cgit v1.2.1 (git 2.18.0) at 2024-05-16 20:17:35 +0000