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path: root/target-mips/translate.c
AgeCommit message (Expand)AuthorFilesLines
2014-11-07target-mips: fix multiple TCG registers covering same dataYongbok Kim1-5/+3
2014-11-07mips: Ensure PC update with MTC0 single-steppingMaciej W. Rozycki1-1/+1
2014-11-07target-mips: fix for missing delay slot in BC1EQZ and BC1NEZLeon Alrae1-0/+1
2014-11-07mips: Respect CP0.Status.CU1 for microMIPS FP branchesMaciej W. Rozycki1-2/+7
2014-11-03target-mips: add MSA MI10 format instructionsYongbok Kim1-1/+48
2014-11-03target-mips: add MSA 2RF format instructionsYongbok Kim1-0/+74
2014-11-03target-mips: add MSA VEC/2R format instructionsYongbok Kim1-0/+113
2014-11-03target-mips: add MSA 3RF format instructionsYongbok Kim1-0/+163
2014-11-03target-mips: add MSA ELM format instructionsYongbok Kim1-0/+118
2014-11-03target-mips: add MSA 3R format instructionsYongbok Kim1-0/+242
2014-11-03target-mips: add MSA BIT format instructionsYongbok Kim1-0/+88
2014-11-03target-mips: add MSA I5 format instructionYongbok Kim1-0/+77
2014-11-03target-mips: add MSA I8 format instructionsYongbok Kim1-2/+80
2014-11-03target-mips: add MSA branch instructionsYongbok Kim1-114/+220
2014-11-03target-mips: add msa_reset(), global msa registerYongbok Kim1-0/+56
2014-11-03target-mips: add MSA opcode enumYongbok Kim1-0/+245
2014-11-03target-mips: stop translation after ctc1Yongbok Kim1-0/+6
2014-11-03target-mips: correctly handle access to unimplemented CP0 registerLeon Alrae1-278/+260
2014-11-03target-mips: implement forbidden slotLeon Alrae1-35/+74
2014-11-03target-mips: add Config5.SBRILeon Alrae1-1/+23
2014-11-03target-mips: add BadInstr and BadInstrP supportLeon Alrae1-6/+70
2014-11-03target-mips: add TLBINV supportLeon Alrae1-0/+22
2014-11-03target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}Leon Alrae1-2/+24
2014-11-03target-mips: add KScratch registersLeon Alrae1-0/+44
2014-10-14target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACXPeter Maydell1-19/+1
2014-10-14target-mips/translate.c: Add ifdef guard around check_mips64()Peter Maydell1-0/+2
2014-10-14target-mips: fix broken MIPS16 and microMIPSYongbok Kim1-182/+116
2014-10-14target-mips/translate.c: Update OPC_SYNCIDongxue Zhang1-1/+6
2014-10-14target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructionsYongbok Kim1-2/+16
2014-10-14target-mips: do not allow Status.FR=0 mode in 64-bit FPULeon Alrae1-0/+6
2014-10-14target-mips: add new Floating Point Comparison instructionsYongbok Kim1-2/+204
2014-10-14target-mips: add new Floating Point instructionsLeon Alrae1-44/+397
2014-10-14target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae1-14/+189
2014-10-13target-mips: add compact and CP1 branchesYongbok Kim1-14/+459
2014-10-13target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim1-12/+108
2014-10-13target-mips: Status.UX/SX/KX enable 32-bit address wrappingLeon Alrae1-5/+1
2014-10-13target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6Leon Alrae1-59/+62
2014-10-13target-mips: redefine Integer Multiply and Divide instructionsLeon Alrae1-21/+322
2014-10-13target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae1-1/+28
2014-10-13target-mips: signal RI Exception on DSP and Loongson instructionsLeon Alrae1-97/+98
2014-10-13target-mips: split decode_opc_special* into *_r6 and *_legacyLeon Alrae1-68/+160
2014-10-13target-mips: extract decode_opc_special* from decode_opcLeon Alrae1-805/+845
2014-10-13target-mips: move LL and SC instructionsLeon Alrae1-2/+26
2014-10-13target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae1-2/+16
2014-10-13target-mips: signal RI Exception on instructions removed in R6Leon Alrae1-8/+56
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluĂ­s Vilanova1-0/+3
2014-07-28target-mips/translate.c: Free TCG in OPC_DINSVDongxue Zhang1-0/+3
2014-07-05mips/kvm: Init EBase to correct KSEG0James Hogan1-1/+7
2014-06-20target-mips: copy CP0_Config1 into DisasContextAurelien Jarno1-9/+11
2014-06-20Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell1-0/+2