peter/qemu - QEMU hacking for Peter

Age	Commit message (Expand)	Author	Files	Lines
2014-12-10	target-tricore: Add instructions of RCR opcode format	Bastian Koppelmann	4	-1/+657
2014-12-10	target-tricore: Add instructions of RLC opcode format	Bastian Koppelmann	5	-0/+252
2014-12-10	target-tricore: Add instructions of RCPW, RCRR and RCRW opcode format	Bastian Koppelmann	1	-3/+129
2014-12-10	target-tricore: Make TRICORE_FEATURES implying others.	Bastian Koppelmann	2	-3/+12
2014-12-10	target-tricore: Add instructions of RC opcode format	Bastian Koppelmann	4	-0/+799
2014-12-10	target-tricore: Add instructions of BRR opcode format	Bastian Koppelmann	2	-2/+89
2014-12-10	target-tricore: Add instructions of BRN opcode format	Bastian Koppelmann	2	-0/+27
2014-12-10	target-tricore: Add instructions of BRC opcode format	Bastian Koppelmann	2	-3/+56
2014-12-10	target-tricore: Add instructions of BOL opcode format	Bastian Koppelmann	2	-1/+51
2014-10-20	target-tricore: Add instructions of BO opcode format	Bastian Koppelmann	4	-0/+704
2014-10-20	target-tricore: Add instructions of BIT opcode format	Bastian Koppelmann	1	-0/+312
2014-10-20	target-tricore: Add instructions of B opcode format	Bastian Koppelmann	1	-0/+27
2014-10-20	target-tricore: Add instructions of ABS, ABSB opcode format	Bastian Koppelmann	3	-0/+352
2014-10-20	target-tricore: Cleanup and Bugfixes	Bastian Koppelmann	2	-27/+22
2014-09-25	target-tricore: Remove the dummy interrupt boilerplate	Richard Henderson	4	-8/+0
2014-09-01	target-tricore: Add instructions of SR opcode format	Bastian Koppelmann	3	-0/+164
2014-09-01	target-tricore: Add instructions of SLR, SSRO and SRO opcode format	Bastian Koppelmann	1	-0/+121
2014-09-01	target-tricore: Add instructions of SC opcode format	Bastian Koppelmann	3	-0/+108
2014-09-01	target-tricore: Add instructions of SBR opcode format	Bastian Koppelmann	1	-1/+65
2014-09-01	target-tricore: Add instructions of SBC and SBRN opcode format	Bastian Koppelmann	1	-0/+36
2014-09-01	target-tricore: Add instructions of SB opcode format	Bastian Koppelmann	3	-0/+276
2014-09-01	target-tricore: Add instructions of SRRS and SLRO opcode format	Bastian Koppelmann	1	-0/+59
2014-09-01	target-tricore: Add instructions of SSR opcode format	Bastian Koppelmann	1	-0/+50
2014-09-01	target-tricore: Add instructions of SRR opcode format	Bastian Koppelmann	3	-0/+211
2014-09-01	target-tricore: Add instructions of SRC opcode format	Bastian Koppelmann	2	-0/+267
2014-09-01	target-tricore: Add masks and opcodes for decoding	Bastian Koppelmann	2	-0/+1407
2014-09-01	target-tricore: Add initialization for translation and activate target	Bastian Koppelmann	1	-0/+165
2014-09-01	target-tricore: Add softmmu support	Bastian Koppelmann	2	-2/+85
2014-09-01	target-tricore: Add target stubs and qom-cpu	Bastian Koppelmann	9	-0/+916