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path: root/target/arm/helper.c
AgeCommit message (Expand)AuthorFilesLines
2018-03-02target/arm: Define an IDAU interfacePeter Maydell1-3/+25
2018-03-01arm/helper.c: re-factor rsqrte and add rsqrte_f16Alex Bennée1-118/+103
2018-03-01arm/helper.c: re-factor recpe and add recepe_f16Alex Bennée1-97/+127
2018-03-01arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16Alex Bennée1-0/+4
2018-03-01target/arm/helper: pass explicit fpst to set_rmodeAlex Bennée1-2/+2
2018-03-01target/arm/cpu.h: add additional float_status flagsAlex Bennée1-5/+21
2018-02-22target/arm: Fix register definitions for VMIDR and VMPIDRPeter Maydell1-4/+4
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée1-0/+1
2018-02-15target/arm: Implement v8M MSPLIM and PSPLIM registersPeter Maydell1-0/+46
2018-02-15target/arm: Implement writing to CONTROL_NS for v8MPeter Maydell1-0/+10
2018-02-15target/arm: Enforce access to ZCR_EL at translationRichard Henderson1-18/+4
2018-02-15target/arm: Suppress TB end for FPCR/FPSRRichard Henderson1-2/+2
2018-02-15target/arm: Enforce FP access to FPCR/FPSRRichard Henderson1-2/+4
2018-02-15target/arm: Remove ARM_CP_64BIT from ZCR_EL registersRichard Henderson1-4/+4
2018-02-09target/arm: Add SVE state to TB->FLAGSRichard Henderson1-1/+24
2018-02-09target/arm: Add ZCR_ELxRichard Henderson1-0/+131
2018-02-09target/arm: Handle exceptions during exception stack popPeter Maydell1-21/+94
2018-02-09target/arm: Make exception vector loads honour the SAUPeter Maydell1-16/+55
2018-02-09target/arm: Make v7m_push_callee_stack() honour MPUPeter Maydell1-15/+49
2018-02-09target/arm: Make v7M exception entry stack push check MPUPeter Maydell1-16/+87
2018-02-09target/arm: Add ignore_stackfaults argument to v7m_exception_taken()Peter Maydell1-12/+23
2018-02-09target/arm: Split "get pending exception info" from "acknowledge it"Peter Maydell1-4/+12
2018-01-25target/arm: Simplify fp_exception_el for user-onlyRichard Henderson1-1/+2
2018-01-25target/arm: Hoist store to flags output in cpu_get_tb_cpu_stateRichard Henderson1-16/+19
2018-01-25target/arm: Move cpu_get_tb_cpu_state out of lineRichard Henderson1-0/+126
2018-01-25target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpersRichard Henderson1-12/+20
2018-01-25target/arm: Change the type of vfp.regsRichard Henderson1-10/+10
2018-01-25target/arm: Fix 32-bit address truncationArd Biesheuvel1-1/+1
2018-01-16target/arm: Handle page table walk load failures correctlyPeter Maydell1-5/+34
2018-01-16get_phys_addr_pmsav7: Support AP=0b111 for v7MPeter Maydell1-0/+14
2017-12-13target/arm: Extend PAR format determinationEdgar E. Iglesias1-4/+29
2017-12-13target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill()Peter Maydell1-31/+14
2017-12-13target/arm: Ignore fsr from get_phys_addr() in do_ats_write()Peter Maydell1-6/+10
2017-12-13target/arm: Convert get_phys_addr_pmsav8() to not return FSC valuesPeter Maydell1-11/+18
2017-12-13target/arm: Convert get_phys_addr_pmsav7() to not return FSC valuesPeter Maydell1-4/+7
2017-12-13target/arm: Convert get_phys_addr_pmsav5() to not return FSC valuesPeter Maydell1-7/+13
2017-12-13target/arm: Convert get_phys_addr_lpae() to not return FSC valuesPeter Maydell1-23/+18
2017-12-13target/arm: Convert get_phys_addr_v6() to not return FSC valuesPeter Maydell1-18/+22
2017-12-13target/arm: Convert get_phys_addr_v5() to not return FSC valuesPeter Maydell1-15/+18
2017-12-13target/arm: Remove fsr argument from arm_ld*_ptw()Peter Maydell1-13/+11
2017-12-13target/arm: Implement TT instructionPeter Maydell1-0/+108
2017-12-13target/arm: Factor MPU lookup code out of get_phys_addr_pmsav8()Peter Maydell1-51/+79
2017-12-13target/arm: Split M profile MNegPri mmu index into user and privPeter Maydell1-4/+7
2017-12-13target/arm: Add missing M profile case to regime_is_user()Peter Maydell1-0/+1
2017-12-13target/arm: Allow explicit writes to CONTROL.SPSEL in Handler modePeter Maydell1-1/+4
2017-12-13target/arm: Handle SPSEL and current stack being out of sync in MSP/PSP readsPeter Maydell1-6/+4
2017-11-20arm: check regime, not current state, for ATS write PAR formatPeter Maydell1-1/+1
2017-11-20target/arm: Report GICv3 sysregs present in ID registers if neededPeter Maydell1-4/+40
2017-11-07arm: implement cache/shareability attribute bits for PAR registersAndrew Baumann1-14/+164
2017-10-12target/arm: Implement secure function returnPeter Maydell1-8/+107