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path: root/target/m68k/translate.c
AgeCommit message (Expand)AuthorFilesLines
2017-01-14target-m68k: increment/decrement with SPLaurent Vivier1-2/+12
2017-01-14target-m68k: CAS doesn't need aligned accessLaurent Vivier1-1/+0
2017-01-14target-m68k: manage pre-dec et post-inc in CASLaurent Vivier1-0/+9
2017-01-14target-m68k: fix gen_flush_flags()Laurent Vivier1-1/+2
2017-01-14target-m68k: fix bit operation with immediate valueLaurent Vivier1-3/+10
2017-01-14target-m68k: Implement bfffoRichard Henderson1-1/+38
2017-01-14target-m68k: Implement bitfield ops for memoryRichard Henderson1-2/+140
2017-01-14target-m68k: Implement bitfield ops for registersRichard Henderson1-0/+210
2016-12-27target-m68k: free TCG variables that are notLaurent Vivier1-9/+32
2016-12-27target-m68k: add rol/ror/roxl/roxr instructionsLaurent Vivier1-0/+391
2016-12-27target-m68k: Inline shiftsRichard Henderson1-25/+201
2016-12-27target-m68k: Do not cpu_abort on undefined insnsRichard Henderson1-3/+5
2016-12-27target-m68k: Implement 680x0 movemLaurent Vivier1-23/+107
2016-12-27target-m68k: add cas/cas2 opsLaurent Vivier1-0/+154
2016-12-27target-m68k: add abcd/sbcd/nbcdLaurent Vivier1-0/+220
2016-12-27target-m68k: add 680x0 divu/divs variantsLaurent Vivier1-37/+47
2016-12-27target-m68k: add 64bit mullLaurent Vivier1-12/+50
2016-12-27target-m68k: add cmpmLaurent Vivier1-0/+16
2016-12-27target-m68k: Split gen_lea and gen_eaRichard Henderson1-53/+59
2016-12-27target-m68k: Delay autoinc writebackRichard Henderson1-20/+64
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+3595