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2018-05-09target/xtensa: avoid integer overflow in next_page PC checkEmilio G. Cota1-5/+4
2018-04-11icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk1-2/+2
2018-03-26target/xtensa: fix timers testMax Filippov1-1/+1
2018-03-26target/xtensa/import_core.sh: fix #include <xtensa-isa.h>Max Filippov1-0/+1
2018-03-26target/xtensa: add .inc. to non-top level source file namesMax Filippov15-13/+13
2018-03-19cpu: get rid of unused cpu_init() definesIgor Mammedov1-2/+0
2018-03-19cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov1-0/+1
2018-03-16target/xtensa: add linux-user supportMax Filippov7-40/+173
2018-03-13target/xtensa: support MTTCGMax Filippov2-15/+34
2018-03-13target/xtensa: use correct number of registers in gdbstubMax Filippov4-13/+41
2018-03-13target/xtensa: mark register windows in the dumpMax Filippov1-2/+7
2018-03-13target/xtensa: dump correct physical registersMax Filippov1-0/+1
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée2-1/+1
2018-02-09Clean up includesMarkus Armbruster6-3/+6
2018-02-09Use #include "..." for our own headers, <...> for othersMarkus Armbruster6-6/+6
2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé1-2/+2
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier1-2/+2
2018-01-24Merge remote-tracking branch 'remotes/xtensa/tags/20180122-xtensa' into stagingPeter Maydell12-7/+27668
2018-01-22target/xtensa: disas/xtensa: fix coverity warningsMax Filippov1-2/+2
2018-01-22target/xtensa: add sample_controller coreMax Filippov5-0/+12216
2018-01-22target/xtensa: allow different default CPU for MMU/noMMUMax Filippov1-1/+6
2018-01-12target/xtensa: Remove duplicate typedef of DisasContextPeter Maydell1-2/+2
2018-01-11target/xtensa: add de212 coreMax Filippov5-0/+15440
2018-01-11target/xtensa: fix default sysrom/sysram addressesMax Filippov1-4/+4
2018-01-09target/xtensa: implement disassemblerMax Filippov1-0/+9
2018-01-09target/xtensa: implement const16Max Filippov1-0/+14
2018-01-09target/xtensa: implement GPIO32Max Filippov2-0/+54
2018-01-09target/xtensa: implement salt/saltuMax Filippov1-0/+18
2018-01-09target/xtensa: add internal/noop SRs and opcodesMax Filippov2-0/+35
2018-01-09target/xtensa: drop DisasContext::litbaseMax Filippov1-22/+5
2018-01-09target/xtensa: use libisa for instruction decodingMax Filippov3-2144/+124
2017-12-18target/xtensa: switch fsf to libisaMax Filippov2-0/+9846
2017-12-18target/xtensa: switch dc233c to libisaMax Filippov2-0/+15236
2017-12-18target/xtensa: switch dc232b to libisaMax Filippov2-0/+14109
2017-12-18target/xtensa: update import_core.sh script for libisaMax Filippov1-0/+15
2017-12-18target/xtensa: extract FPU2000 opcode translatorsMax Filippov2-0/+375
2017-12-18target/xtensa: extract core opcode translatorsMax Filippov2-0/+3145
2017-12-18target/xtensa: import libisa sourceMax Filippov4-0/+1978
2017-12-18target/xtensa: pass actual frame size to the entry helperMax Filippov2-2/+2
2017-10-30Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell3-2/+6
2017-10-27xtensa: cleanup cpu type name compositionIgor Mammedov3-2/+6
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell1-1/+1
2017-10-25disas: Remove unused flags argumentsRichard Henderson1-1/+1
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson1-3/+0
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota1-1/+1
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota1-14/+14
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson1-6/+1
2017-10-09qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé1-4/+0
2017-09-26target/xtensa: Use the pre-defined MEMTXATTRS_UNSPECIFIED macroAlistair Francis1-2/+2
2017-09-06target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova1-0/+4
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