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path: root/tcg/arm/tcg-target.c
AgeCommit message (Expand)AuthorFilesLines
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson1-2/+2
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson1-1/+1
2010-04-25tcg/arm: fix condition in zero/sign extension functionsAurelien Jarno1-6/+6
2010-04-19tcg/arm: don't try to load constants using pcAurelien Jarno1-7/+0
2010-04-19tcg/arm: optimize register allocation orderAurelien Jarno1-5/+5
2010-04-19tcg/arm: fix argument alignment in qemu_st64Aurelien Jarno1-9/+10
2010-04-19tcg/arm: remove useless register tests in qemu_ld/stAurelien Jarno1-20/+10
2010-04-19tcg/arm: bswap arguments in qemu_ld/st if neededAurelien Jarno1-69/+159
2010-04-19tcg/arm: use ext* ops in qemu_ldAurelien Jarno1-18/+12
2010-04-19tcg/arm: remove conditional argument for qemu_ld/stAurelien Jarno1-51/+49
2010-04-19tcg/arm: add bswap opsAurelien Jarno1-0/+42
2010-04-19tcg/arm: add ext16u opAurelien Jarno1-18/+48
2010-04-19tcg/arm: add rotation opsAurelien Jarno1-0/+19
2010-04-19tcg/arm: use the blx instruction when possibleAurelien Jarno1-4/+12
2010-04-19tcg/arm: sxtb and sxth are available starting with ARMv6Aurelien Jarno1-2/+2
2010-04-19tcg/arm: add variables to define the allowed instructions setAurelien Jarno1-39/+84
2010-04-19tcg/arm: replace integer values by registers enumAurelien Jarno1-109/+124
2010-04-19tcg/arm: remove store signed functionsAurelien Jarno1-62/+10
2010-04-19tcg/arm: explicitely list clobbered/reserved regsAurelien Jarno1-4/+9
2010-04-19tcg/arm: remove SAVE_LR codeAurelien Jarno1-43/+0
2010-03-28tcg/arm: Replace qemu_ld32u (left over from previous commit)Stefan Weil1-1/+1
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson1-2/+2
2010-03-26tcg: Name the opcode enumeration.Richard Henderson1-1/+1
2010-03-20tcg/arm: don't save/restore r7 in prologue/epilogueAurelien Jarno1-6/+6
2010-03-20tcg/arm: fix load/store definitions for 32-bit targetsAurelien Jarno1-0/+14
2010-03-14tcg/arm: use helpers for divu/remuAurelien Jarno1-94/+0
2010-03-13tcg/arm: implement andc opAurelien Jarno1-0/+4
2010-03-13tcg/arm: correctly save/restore registers in prologue/epilogueAurelien Jarno1-4/+7
2010-03-12Remove TLB from userspacePaul Brook1-0/+2
2010-03-02tcg/arm: accept immediate arguments for brcond/setcondAurelien Jarno1-6/+20
2010-03-02Add a missing breakAndrzej Zaborowski1-0/+1
2010-03-02tcg/arm: implement setcond2Aurelien Jarno1-0/+11
2010-03-02tcg/arm: implement setcondAurelien Jarno1-0/+9
2010-03-02tcg/arm: fix div2/divu2Aurelien Jarno1-6/+24
2009-09-26ARM back-end: Use sxt[bh] instructions for ext{8, 6}sLaurent Desnogues1-0/+10
2009-09-25Suppress some variants of English in commentsStefan Weil1-2/+2
2009-08-25ARM back-end: Fix encode_immLaurent Desnogues1-0/+2
2009-08-22ARM back-end: Handle all possible immediates for ALU opsLaurent Desnogues1-5/+32
2009-08-22ARM back-end: Add TCG notLaurent Desnogues1-0/+5
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
2009-07-18this patch improves the ARM back-end in the following way:Laurent Desnogues1-7/+35
2009-07-17Userspace guest address offsettingPaul Brook1-2/+32
2009-07-17ARM host fixesPaul Brook1-1/+1
2009-03-10tcg-arm: fix qemu_ld64aurel321-2/+7
2008-12-07Fix 64-bit targets compilation on ARM host.balrog1-6/+6
2008-12-01arm: Don't potentially overwrite input registers in add2, sub2.balrog1-4/+13
2008-12-01Don't rely on ARM tcg_out_goto() generating just a single insn.balrog1-8/+13
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir11-5/+8
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-9/+2
2008-05-25Fix off-by-one unwinding error.pbrook1-1/+0
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