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-rwxr-xr-xchip_design/generate-chipdesign.py12
1 files changed, 8 insertions, 4 deletions
diff --git a/chip_design/generate-chipdesign.py b/chip_design/generate-chipdesign.py
index d834078..23328ae 100755
--- a/chip_design/generate-chipdesign.py
+++ b/chip_design/generate-chipdesign.py
@@ -111,11 +111,15 @@ for i in range(len(powers), len(all_components)):
# Power (j) top/right side hits component (i) bottom/left side or
# Power (j) bottom/left side hits component (i) top/right side.
# (note: copied from above overlap check with '>='/'<=' -> '='.)
+ # Additionally: to "hit" the power resource over the X axis, an
+ # component Y coordinate must be within the power resource.
+ # FIXME need to check whether there is an overlap
+ pr_range = ' (>= x{j} )'
altpreds += fillin([
- '(= (+ y{j} h{j}) y{i})',
- '(= (+ x{j} w{j}) x{i})',
- '(= y{j} (+ y{i} h{i}))',
- '(= x{j} (+ x{i} w{i}))',
+ '(and (= (+ y{j} h{j}) y{i})'' )',
+ '(and (= (+ x{j} w{j}) x{i})'' )',
+ '(and (= y{j} (+ y{i} h{i}))'' )',
+ '(and (= x{j} (+ x{i} w{i}))'' )',
], vars())
preds += ['(or %s)' % ' \n'.join(altpreds)]