Fix right shift for -1 (all bits 1)

1 files changed, 2 insertions, 0 deletions

diff --git a/pp2cc.py b/pp2cc.py
index a13be6f..5dce20c 100755
--- a/pp2cc.py
+++ b/pp2cc.py
@@ -551,6 +551,8 @@ class Parse(object):
                         lines.append(self.asm.binary_op("CMP", reg_first, 0))
                         # if it's positive, skip handling for negative values
                         lines.append(self.asm.branch_op("BPL", lbl_make_positive))
+                        # -1 / 2 = 0, so make sure that the last bit is zero
+                        lines.append(self.asm.binary_op("AND", reg_first, "%10"))
                         # shift it by one
                         lines.append(self.asm.binary_op("DIV", reg_first, 1))
                         # make it positive if not already