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authorAlex Bennée <alex.bennee@linaro.org>2018-03-01 11:05:48 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-03-01 11:13:59 +0000
commit3840d219b433507f04a685120ff770ce4e06c55d (patch)
tree20f2d24688370cf2899860c7d66581d68b1080ab /target/arm/translate-a64.c
parent807cdd504283c11addcd7ea95ba594bbddc86fe4 (diff)
downloadqemu-3840d219b433507f04a685120ff770ce4e06c55d.tar.gz
arm/translate-a64: handle_3same_64 comment fix
We do implement all the opcodes. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180227143852.11175-8-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
-rw-r--r--target/arm/translate-a64.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ebaf4571ac..5dd54b7ac4 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -7278,8 +7278,7 @@ static void handle_3same_64(DisasContext *s, int opcode, bool u,
/* Handle 64x64->64 opcodes which are shared between the scalar
* and vector 3-same groups. We cover every opcode where size == 3
* is valid in either the three-reg-same (integer, not pairwise)
- * or scalar-three-reg-same groups. (Some opcodes are not yet
- * implemented.)
+ * or scalar-three-reg-same groups.
*/
TCGCond cond;