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authorPeter Maydell <peter.maydell@linaro.org>2017-10-06 16:46:49 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-10-06 16:46:49 +0100
commitfe768788d29597ee56fc11ba2279d502c2617457 (patch)
treebd7d079816fbdabda75fe56643d072c02b115dc3 /target/arm
parent35337cc391245f251bfb9134f181c33e6375d6c1 (diff)
downloadqemu-fe768788d29597ee56fc11ba2279d502c2617457.tar.gz
target/arm: Fix calculation of secure mm_idx values
In cpu_mmu_index() we try to do this: if (env->v7m.secure) { mmu_idx += ARMMMUIdx_MSUser; } but it will give the wrong answer, because ARMMMUIdx_MSUser includes the 0x40 ARM_MMU_IDX_M field, and so does the mmu_idx we're adding to, and we'll end up with 0x8n rather than 0x4n. This error is then nullified by the call to arm_to_core_mmu_idx() which masks out the high part, but we're about to factor out the code that calculates the ARMMMUIdx values so it can be used without passing it through arm_to_core_mmu_idx(), so fix this bug first. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1506092407-26985-16-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm')
-rw-r--r--target/arm/cpu.h12
1 files changed, 7 insertions, 5 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 441e584f1b..70c1f85121 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2335,14 +2335,16 @@ static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)
int el = arm_current_el(env);
if (arm_feature(env, ARM_FEATURE_M)) {
- ARMMMUIdx mmu_idx = el == 0 ? ARMMMUIdx_MUser : ARMMMUIdx_MPriv;
+ ARMMMUIdx mmu_idx;
- if (armv7m_nvic_neg_prio_requested(env->nvic, env->v7m.secure)) {
- mmu_idx = ARMMMUIdx_MNegPri;
+ if (el == 0) {
+ mmu_idx = env->v7m.secure ? ARMMMUIdx_MSUser : ARMMMUIdx_MUser;
+ } else {
+ mmu_idx = env->v7m.secure ? ARMMMUIdx_MSPriv : ARMMMUIdx_MPriv;
}
- if (env->v7m.secure) {
- mmu_idx += ARMMMUIdx_MSUser;
+ if (armv7m_nvic_neg_prio_requested(env->nvic, env->v7m.secure)) {
+ mmu_idx = env->v7m.secure ? ARMMMUIdx_MSNegPri : ARMMMUIdx_MNegPri;
}
return arm_to_core_mmu_idx(mmu_idx);