diff options
| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-06-20 13:53:53 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-07-04 09:22:20 +0200 |
| commit | 8fc5239e1f8df617147dfe9761dd78291fea78d7 (patch) | |
| tree | 9564ac3cf153433d0a1239a5816a8a34e56bbc07 /target/microblaze/translate.c | |
| parent | 5683750909fb407261b5ad00fed4ad9460ab6845 (diff) | |
| download | qemu-8fc5239e1f8df617147dfe9761dd78291fea78d7.tar.gz | |
target-microblaze: Introduce a use-pcmp-instr property
Introduce a use-pcmp-instr property making pcmp instructions
optional.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/translate.c')
| -rw-r--r-- | target/microblaze/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index bb1bdfa583..fbb8bb44db 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -326,7 +326,7 @@ static void dec_pattern(DisasContext *dc) if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) - && !((dc->cpu->env.pvr.regs[2] & PVR2_USE_PCMP_INSTR))) { + && !dc->cpu->cfg.use_pcmp_instr) { tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); t_gen_raise_exception(dc, EXCP_HW_EXCP); } @@ -762,11 +762,11 @@ static void dec_bit(DisasContext *dc) case 0xe0: if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) - && !((dc->cpu->env.pvr.regs[2] & PVR2_USE_PCMP_INSTR))) { + && !dc->cpu->cfg.use_pcmp_instr) { tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); t_gen_raise_exception(dc, EXCP_HW_EXCP); } - if (dc->cpu->env.pvr.regs[2] & PVR2_USE_PCMP_INSTR) { + if (dc->cpu->cfg.use_pcmp_instr) { tcg_gen_clzi_i32(cpu_R[dc->rd], cpu_R[dc->ra], 32); } break; |