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author | Peter Maydell <peter.maydell@linaro.org> | 2017-10-30 10:11:22 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-10-30 10:11:22 +0000 |
commit | ab752f237d755897735dc755182f60af39cbc5b6 (patch) | |
tree | c7c3ad0f9daf8405cf475730801421b5643e75f5 /target/mips/translate.c | |
parent | 953e35f69c302522c280e8d4e05995afc31da051 (diff) | |
parent | 1a26f46692320f1981c95967e0d5af4443b5f0b1 (diff) | |
download | qemu-ab752f237d755897735dc755182f60af39cbc5b6.tar.gz |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
x86/cpu/numa queue, 2017-10-27
# gpg: Signature made Fri 27 Oct 2017 15:17:12 BST
# gpg: using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-and-machine-pull-request: (39 commits)
x86: Skip check apic_id_limit for Xen
numa: fixup parsed NumaNodeOptions earlier
mips: r4k: replace cpu_model with cpu_type
mips: mipssim: replace cpu_model with cpu_type
mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
mips: fulong2e: replace cpu_model with cpu_type
mips: malta/boston: replace cpu_model with cpu_type
mips: use object_new() instead of gnew()+object_initialize()
sparc: leon3: use generic cpu_model parsing
sparc: sparc: use generic cpu_model parsing
sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
sparc: cleanup cpu type name composition
tricore: use generic cpu_model parsing
tricore: cleanup cpu type name composition
unicore32: use generic cpu_model parsing
unicore32: cleanup cpu type name composition
xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
xtensa: sim: use generic cpu_model parsing
xtensa: cleanup cpu type name composition
sh4: remove SuperHCPUClass::name field
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/mips/translate.c')
-rw-r--r-- | target/mips/translate.c | 20 |
1 files changed, 6 insertions, 14 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index d0690f7df6..b022f840c9 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20512,24 +20512,16 @@ void cpu_mips_realize_env(CPUMIPSState *env) mvp_init(env, env->cpu_model); } -bool cpu_supports_cps_smp(const char *cpu_model) +bool cpu_supports_cps_smp(const char *cpu_type) { - const mips_def_t *def = cpu_mips_find_by_name(cpu_model); - if (!def) { - return false; - } - - return (def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; + const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); + return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; } -bool cpu_supports_isa(const char *cpu_model, unsigned int isa) +bool cpu_supports_isa(const char *cpu_type, unsigned int isa) { - const mips_def_t *def = cpu_mips_find_by_name(cpu_model); - if (!def) { - return false; - } - - return (def->insn_flags & isa) != 0; + const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); + return (mcc->cpu_def->insn_flags & isa) != 0; } void cpu_set_exception_base(int vp_index, target_ulong address) |