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| author | Richard Henderson <rth@twiddle.net> | 2017-07-18 10:02:50 -1000 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-07-18 23:39:18 +0200 |
| commit | 61dedf2af79fb5866dc7a0f972093682f2185e17 (patch) | |
| tree | 44f15a586535398d247da95ecd893f61ef7cc36a /target/sh4/translate.c | |
| parent | 907759f9979d512eb072b8c31c921a78e44b8aa9 (diff) | |
| download | qemu-61dedf2af79fb5866dc7a0f972093682f2185e17.tar.gz | |
target/sh4: Add missing FPSCR.PR == 0 checks
Both frchg and fschg require PR == 0, otherwise undefined_operation.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170718200255.31647-26-rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/translate.c')
| -rw-r--r-- | target/sh4/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 1ed0349374..92a2c002fc 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -473,10 +473,12 @@ static void _decode_opc(DisasContext * ctx) tcg_gen_movi_i32(cpu_sr_t, 1); return; case 0xfbfd: /* frchg */ + CHECK_FPSCR_PR_0 tcg_gen_xori_i32(cpu_fpscr, cpu_fpscr, FPSCR_FR); ctx->bstate = BS_STOP; return; case 0xf3fd: /* fschg */ + CHECK_FPSCR_PR_0 tcg_gen_xori_i32(cpu_fpscr, cpu_fpscr, FPSCR_SZ); ctx->bstate = BS_STOP; return; |