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peter/qemu
bdrv-getlength-conversion
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block-dmg
block-dmg-2.2
block-dmg-2.3
block-dmg-2.3-v2
doc-updates
gdbstub-fixes
gtk-toggle-menubar
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QEMU hacking for Peter
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accel
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tcg
Age
Commit message (
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Author
Files
Lines
2017-10-24
tcg: take tb_ctx out of TCGContext
Emilio G. Cota
2
-30
/
+29
2017-10-24
translate-all: report correct avg host TB size
Emilio G. Cota
1
-9
/
+23
2017-10-24
exec-all: rename tb_free to tb_remove
Emilio G. Cota
2
-4
/
+4
2017-10-24
translate-all: use a binary search tree to track TBs in TBContext
Emilio G. Cota
1
-108
/
+113
2017-10-24
tcg: Remove CF_IGNORE_ICOUNT
Richard Henderson
2
-10
/
+9
2017-10-24
cpu-exec: lookup/generate TB outside exclusive region during step_atomic
Emilio G. Cota
1
-16
/
+14
2017-10-24
tcg: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
1
-0
/
+1
2017-10-24
tcg: convert tb->cflags reads to tb_cflags(tb)
Emilio G. Cota
1
-2
/
+2
2017-10-24
tcg: Add CPUState cflags_next_tb
Richard Henderson
2
-30
/
+27
2017-10-24
tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK
Emilio G. Cota
3
-27
/
+33
2017-10-20
accel/tcg: allow to invalidate a write TLB entry immediately
David Hildenbrand
2
-3
/
+6
2017-10-16
tcg: Fix off-by-one in assert in page_set_flags
Richard Henderson
1
-1
/
+1
2017-10-10
exec-all: extract tb->tc_* into a separate struct tc_tb
Emilio G. Cota
3
-21
/
+21
2017-10-10
translate-all: define and use DEBUG_TB_CHECK_GATE
Emilio G. Cota
1
-6
/
+22
2017-10-10
translate-all: define and use DEBUG_TB_INVALIDATE_GATE
Emilio G. Cota
1
-3
/
+9
2017-10-10
exec-all: introduce TB_PAGE_ADDR_FMT
Emilio G. Cota
1
-2
/
+1
2017-10-10
translate-all: define and use DEBUG_TB_FLUSH_GATE
Emilio G. Cota
1
-7
/
+13
2017-10-10
exec-all: bring tb->invalid into tb->cflags
Emilio G. Cota
2
-4
/
+3
2017-10-10
tcg: consolidate TB lookups in tb_lookup__cpu_state
Emilio G. Cota
2
-47
/
+24
2017-10-10
tcg: remove addr argument from lookup_tb_ptr
Emilio G. Cota
2
-11
/
+11
2017-10-10
cpu-exec: rename have_tb_lock to acquired_tb_lock in tb_find
Emilio G. Cota
1
-5
/
+5
2017-10-10
translate-all: make have_tb_lock static
Emilio G. Cota
1
-1
/
+1
2017-10-10
tcg: fix corruption of code_time profiling counter upon tb_flush
Emilio G. Cota
1
-2
/
+2
2017-10-10
cputlb: bring back tlb_flush_count under !TLB_DEBUG
Emilio G. Cota
2
-4
/
+15
2017-09-25
accel/tcg/cputlb: avoid recursive BQL (fixes #1706296)
Alex Bennée
1
-2
/
+2
2017-09-17
accel/tcg: move USER code to user-exec.c
Philippe Mathieu-Daudé
2
-54
/
+52
2017-09-17
accel/tcg: move atomic_template.h to accel/tcg/
Philippe Mathieu-Daudé
1
-0
/
+215
2017-09-17
accel/tcg: move tcg-runtime to accel/tcg/
Philippe Mathieu-Daudé
3
-0
/
+371
2017-09-17
accel/tcg: move user-exec to accel/tcg/
Philippe Mathieu-Daudé
3
-0
/
+612
2017-09-17
accel/tcg: move softmmu_template.h to accel/tcg/
Thomas Huth
1
-0
/
+433
2017-09-07
tcg: Infrastructure for managing constant pools
Richard Henderson
1
-1
/
+21
2017-09-07
tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h
Richard Henderson
2
-7
/
+42
2017-09-06
tcg: Add generic translation framework
Lluís Vilanova
2
-0
/
+139
2017-09-04
cputlb: Support generating CPU exceptions on memory transaction failures
Peter Maydell
1
-2
/
+30
2017-08-01
trace-events: fix code style: print 0x before hex numbers
Vladimir Sementsov-Ogievskiy
1
-1
/
+1
2017-07-19
tcg: Pass generic CPUState to gen_intermediate_code()
Lluís Vilanova
1
-1
/
+1
2017-07-17
exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state
Lluís Vilanova
2
-4
/
+15
2017-07-14
translate-all: remove redundant !tcg_enabled check in dump_exec_info
Emilio G. Cota
1
-5
/
+0
2017-07-09
tcg/aarch64: Use ADRP+ADD to compute target address
Pranith Kumar
1
-1
/
+1
2017-07-04
monitor: disable "info jit" and "info opcount" if !TCG
Paolo Bonzini
1
-0
/
+5
2017-07-04
tcg: make tcg_allowed global
Yang Zhong
3
-6
/
+3
2017-07-04
cpu: move interrupt handling out of translate-common.c
Paolo Bonzini
3
-54
/
+33
2017-07-04
tcg: move page_size_init() function
Yang Zhong
2
-21
/
+0
2017-07-04
vl: convert -tb-size to qemu_strtoul
Paolo Bonzini
1
-1
/
+1
2017-07-04
cpu: Introduce a wrapper for tlb_flush() that can be used in common code
Thomas Huth
1
-0
/
+8
2017-06-30
tcg: consistently access cpu->tb_jmp_cache atomically
Emilio G. Cota
2
-16
/
+14
2017-06-27
exec: allow to get a pointer for some mmio memory region
KONRAD Frederic
1
-0
/
+10
2017-06-27
cputlb: fix the way get_page_addr_code fills the tlb
KONRAD Frederic
1
-2
/
+4
2017-06-27
cputlb: move get_page_addr_code
KONRAD Frederic
1
-35
/
+35
2017-06-27
cputlb: cleanup get_page_addr_code to use VICTIM_TLB_HIT
KONRAD Frederic
1
-9
/
+9
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